ICE40LM2K-SWG25TR50

ICE40LM2K-SWG25TR50 Datasheet

iCE40LM Family Data Sheet

Part	Datasheet
ICE40LM2K-SWG25TR50	ICE40LM2K-SWG25TR50 (pdf)

Related Parts	Information
ICE40LM1K-CM49	ICE40LM1K-CM49
ICE40LM4K-CM49	ICE40LM4K-CM49
ICE40LM4K-CM36	ICE40LM4K-CM36
ICE40LM2K-CM36	ICE40LM2K-CM36
ICE40LM1K-CM36	ICE40LM1K-CM36
ICE40LM2K-CM49	ICE40LM2K-CM49
ICE40LM4K-SWG25TR50	ICE40LM4K-SWG25TR50
ICE40LM1K-SWG25TR50	ICE40LM1K-SWG25TR50

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iCE40LM Family Data Sheet Advance DS1045 Version October 2013 iCE40LM Family Data Sheet Introduction October 2013 Advance Data Sheet DS1045 iCE40LM family is an ultra-low power FPGA and sensor manager designed for ultra-low power mobile applications, such as smartphones, tablets and hand-held devices. The iCE40LM family includes integrated SPI & I2C blocks to interface with virtually all mobile sensors and application processors. The iCE40LM family also features two Strobe Generators that can generates strobes in Microsecond ranges with the Low-Power Strobe Generator, and also generates strobes in Nanosecond ranges with the High-Speed Strobe Generator. In addition, the iCE40LM family of devices includes logic to perform other functions such as mobile bridging, antenna tuning, GPIO expansion, motion/gesture recognition, IR remote control, bar code emulation and other custom functions. The iCE40LM family features three device densities, from 1000 to 3520 Look Up Tables LUTs of logic with programmable I/Os that can be used as either SPI/I2C interface ports or general purpose I/O’s. It also has up to 80Kbits of Block RAMs to work with user logic. Flexible Logic Architecture • Three devices with 1000 to 3520 LUTs • 18 I/O pins for 25-pin WLCSP Ultra-low Power Devices • Advanced 40 nm ultra-low power process • As low as 120 µW standby power typical Embedded and Distributed Memory • Up to 80 Kbits sysMEM Embedded Block Two Hardened I2C Interfaces Two Hardened SPI Interfaces Two On-Chip Strobe Generators • Low-Power Strobe Generator  Microsecond ranges • High-Speed Strobe Generator  Nanosecond ranges High Current Drive Outputs for LED • 3 High Drive HD output in each device • Source/sink nominal 24mA Flexible On-Chip Clocking • Six low-skew global signal resource Flexible Device Configuration • SRAM is configured through SPI Ultra-Small Form Factor • As small as 25-pin WLCSP package  1.71mm x mm • Smartphones • Tablets and Consumer Handheld Devices • Handheld Commercial and Industrial Devices • Multi Sensor Management Applications • Sensor Pre-processing & Sensor Fusion • Always-On Sensor Applications 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. DS1045 Introduction_01.2 Introduction iCE40LM Family Data Sheet Table iCE40LM Family Selection Guide Part Number Logic Cells LUT + Flip-Flop RAM4K Memory Blocks RAM4K RAM Bits Package 25-pin WLCSP, x mm, 0.35mm 36-pin ucBGA, x mm, 0.40mm 49-pin ucBGA, 3 x 3 mm, 0.40mm iCE40LM1K 1000 16 64K 18 28 37 iCE40LM2K 2000 20 80K Programmable I/O Count 18 28 37 iCE40LM Family Data Sheet Ordering Information September 2013 iCE40LM Part Number Description Advance Data Sheet DS1045 iCE40LMXXX - Device Family iCE40LM FPGA Logic Cells 1K = 1,000 Logic Cells 2K = 2,000 Logic Cells 4K = 3,520 Logic Cells All parts are shipped in tape-and-reel. Ordering Part Numbers Part Number iCE40LM1K-SWG25TR iCE40LM1K-CM36TR iCE40LM1K-CM49TR iCE40LM2K-SWG25TR iCE40LM2K-CM36TR iCE40LM2K-CM49TR iCE40LM4K-SWG25TR iCE40LM4K-CM36TR iCE40LM4K-CM49TR LUTs 1000 2000 3520 Supply Voltage 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V TR = Tape-and-Reel Package SWG25 = 25-Ball WLCSP mm Ball Pitch CM36 = 36-Ball ucBGA 0.4mm Ball Pitch CM49 = 49-Ball ucBGA 0.4mm Ball Pitch Package Halogen-Free caBGA Halogen-Free csBGA Halogen-Free csBGA Halogen-Free caBGA Halogen-Free csBGA Halogen-Free csBGA Halogen-Free caBGA Halogen-Free csBGA Halogen-Free csBGA Leads 25 36 49 25 36 49 25 36 49 Temp. IND 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. DS1045 Order Info_01.1 iCE40LM Family Data Sheet Supplemental Information August 2013 For Further Information A variety of technical notes for the iCE40 family are available on the Lattice web site. • TN1248, iCE40 Programming and Configuration • TN1274, iCE40LM SPI/I2C Hardened IP Usage Guide • TN1275, iCE40LM On-Chip Strobe Generator Usage Guide • TN1276, iCE40LM Advanced SPI/I2C Hardened IP Usage Guide • TN1250, Memory Usage Guide for iCE40 Devices • TN1251, iCE40 sysCLOCK PLL Design and Usage Guide • iCE40LM Pinout Files • iCE40LM Pin Migration Files • Thermal Management document • Lattice design tools • Schematic Symbols Advance Data Sheet DS1045 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. DS1045 Further Info_01.0 October 2013 Advance Data Sheet DS1045 Version August 2013 EAP September 2013 EAP October 2013 Section All Pinout Information Change Summary Initial release. General updates to all sections. General updates for product launch. Updated ball map to 25-pin WLCSP. 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

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iCE40LM Family Data Sheet

Advance DS1045 Version October 2013
iCE40LM Family Data Sheet Introduction

October 2013

Advance Data Sheet DS1045
iCE40LM family is an ultra-low power FPGA and sensor manager designed for ultra-low power mobile applications, such as smartphones, tablets and hand-held devices. The iCE40LM family includes integrated SPI & I2C blocks to interface with virtually all mobile sensors and application processors. The iCE40LM family also features two Strobe Generators that can generates strobes in Microsecond ranges with the Low-Power Strobe Generator, and also generates strobes in Nanosecond ranges with the High-Speed Strobe Generator.

In addition, the iCE40LM family of devices includes logic to perform other functions such as mobile bridging, antenna tuning, GPIO expansion, motion/gesture recognition, IR remote control, bar code emulation and other custom functions.

The iCE40LM family features three device densities, from 1000 to 3520 Look Up Tables LUTs of logic with programmable I/Os that can be used as either SPI/I2C interface ports or general purpose I/O’s. It also has up to 80Kbits of Block RAMs to
work with user logic.

Flexible Logic Architecture
• Three devices with 1000 to 3520 LUTs
• 18 I/O pins for 25-pin WLCSP

Ultra-low Power Devices
• Advanced 40 nm ultra-low power process
• As low as 120 µW standby power typical

Embedded and Distributed Memory
• Up to 80 Kbits sysMEM Embedded Block

Two Hardened I2C Interfaces Two Hardened SPI Interfaces Two On-Chip Strobe Generators
• Low-Power Strobe Generator  Microsecond ranges
• High-Speed Strobe Generator  Nanosecond ranges

High Current Drive Outputs for LED
• 3 High Drive HD output in each device
• Source/sink nominal 24mA

Flexible On-Chip Clocking
• Six low-skew global signal resource

Flexible Device Configuration
• SRAM is configured through SPI

Ultra-Small Form Factor
• As small as 25-pin WLCSP package 
1.71mm x mm
• Smartphones
• Tablets and Consumer Handheld Devices
• Handheld Commercial and Industrial Devices
• Multi Sensor Management Applications
• Sensor Pre-processing & Sensor Fusion
• Always-On Sensor Applications
2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

DS1045 Introduction_01.2

Introduction iCE40LM Family Data Sheet

Table iCE40LM Family Selection Guide

Part Number Logic Cells LUT + Flip-Flop RAM4K Memory Blocks RAM4K RAM Bits Package 25-pin WLCSP, x mm, 0.35mm 36-pin ucBGA, x mm, 0.40mm 49-pin ucBGA, 3 x 3 mm, 0.40mm
iCE40LM1K 1000 16 64K
18 28 37
iCE40LM2K 2000 20 80K

Programmable I/O Count 18 28 37
iCE40LM Family Data Sheet Ordering Information

September 2013
iCE40LM Part Number Description

Advance Data Sheet DS1045
iCE40LMXXX -

Device Family iCE40LM FPGA

Logic Cells 1K = 1,000 Logic Cells 2K = 2,000 Logic Cells 4K = 3,520 Logic Cells

All parts are shipped in tape-and-reel.
Ordering Part Numbers

Part Number iCE40LM1K-SWG25TR iCE40LM1K-CM36TR iCE40LM1K-CM49TR iCE40LM2K-SWG25TR iCE40LM2K-CM36TR iCE40LM2K-CM49TR iCE40LM4K-SWG25TR iCE40LM4K-CM36TR iCE40LM4K-CM49TR

LUTs 1000 2000 3520

Supply Voltage 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V

TR = Tape-and-Reel

Package SWG25 = 25-Ball WLCSP mm Ball Pitch CM36 = 36-Ball ucBGA 0.4mm Ball Pitch CM49 = 49-Ball ucBGA 0.4mm Ball Pitch

Package Halogen-Free caBGA Halogen-Free csBGA Halogen-Free csBGA Halogen-Free caBGA Halogen-Free csBGA Halogen-Free csBGA Halogen-Free caBGA Halogen-Free csBGA Halogen-Free csBGA

Leads 25 36 49 25 36 49 25 36 49

Temp. IND
2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

DS1045 Order Info_01.1
iCE40LM Family Data Sheet Supplemental Information

August 2013

For Further Information

A variety of technical notes for the iCE40 family are available on the Lattice web site.
• TN1248, iCE40 Programming and Configuration
• TN1274, iCE40LM SPI/I2C Hardened IP Usage Guide
• TN1275, iCE40LM On-Chip Strobe Generator Usage Guide
• TN1276, iCE40LM Advanced SPI/I2C Hardened IP Usage Guide
• TN1250, Memory Usage Guide for iCE40 Devices
• TN1251, iCE40 sysCLOCK PLL Design and Usage Guide
• iCE40LM Pinout Files
• iCE40LM Pin Migration Files
• Thermal Management document
• Lattice design tools
• Schematic Symbols

Advance Data Sheet DS1045
2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

DS1045 Further Info_01.0

October 2013

Advance Data Sheet DS1045

Version

August 2013 EAP

September 2013 EAP

October 2013

Section All

Pinout Information

Change Summary Initial release. General updates to all sections. General updates for product launch. Updated ball map to 25-pin WLCSP.
2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived ICE40LM2K-SWG25TR50 Datasheet file may be downloaded here without warranties.

Datasheet ID: ICE40LM2K-SWG25TR50 645474