M-991
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M-991 (pdf) |
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M-991-01SM |
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M-991-01SMTR |
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INTEGRATED CIRCUITS DIVISION Features • Generates standard call progress tones • Digital input control • Linear analog output • Power output capable of driving standard line • 14-pin DIP and 16-pin SOIC package types • Single supply 5V CMOS low power • Inexpensive MHz time base • Temperature range from -25ºC to 70ºC • Telephone Systems • Test Equipment • Callback • Security Systems • Billing Systems M-991 Call Progress Tone Generator Description The M-991 is a call progress tone generator integrated circuit for use in telephone systems. The circuit uses low-power CMOS techniques to generate tones which are digitally controlled and highly linear. The M-991 is designed to permit operation with almost any system. The use of integrated circuit techniques allows the M-991 to incorporate the control, tone generating, and power output buffer into a single 14-pin DIP or 16-pin SOIC. A 3.58-MHz color burst crystal-controlled time base guarantees accuracy and repeatability. Ordering Information Part # M-991 M-991-01SM M-991-01SMTR Description 14-Pin Plastic DIP 16-Pin SOIC 16-Pin SOIC, Tape & Reel Pin Configuration Block Diagram DS-M-991-R03 INTEGRATED CIRCUITS DIVISION Absolute Maximum Ratings Parameter VDD Any Input Voltage Operating Ambient Temperature Storage Temperature Ratings 7 VSS-0.6 to VDD+0.6 -25 to +70 -55 to +125 Units V °C °C M-991 Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied. Exposure of the device to the absolute maximum ratings for an extended period may degrade the device and affect its reliability. Specifications Parameter Power Supply and Reference Oscillator Tone Output Control Timing VDD Current Drain IDD VREF Pin Deviation From VDD+VSS /2 Internal Resistance From VREF to VDD, VSS Frequency Deviation External Clock XOUT Open VIL VIH Duty Cycle XIN, XOUT Loading Capacitance Resistance Frequency Deviation Level Distorting Components Idle OUTDRIVE Envelope Rise Time DX, CE Pins: VIL VIH Mute Pins: VOL ISINK = VOH ISOURCE = Data Setup tDS Data Hold tDH Chip Enable Fall tPL Turn On Delay tTO Turn Off Delay tTD Mute Delay from Outdrive tMO 0 VDD- 20 100 -35 - VDD- 200 10 - Notes Unless Otherwise 1 All DC voltages are referenced to VSS. 2 Vrms per tone, load. 3 Any one frequency relative to the lowest level output tone f<4000Hz 4 0 dBm = 0.775Vrms. 5 To 90% maximum amplitude. 6 For all supply voltages in the operating range. Units Notes 7 At XOUT pin as compared to 3.579545MHz. 8 OUTDRIVE with load > 5 with load. 9 Resistance at VREF to VDD or VSS > 10 Crystal oscillator active. 11 Measured 90% to INTEGRATED CIRCUITS DIVISION M-991 |
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