ISL6590
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ISL6590DR-T (pdf) |
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Data Sheet April 2003 ISL6590 FN9061 Digital Multi-Phase PWM Controller for Core-Voltage Regulation Processors that operate above a GHz require fast, intelligent power systems. The Intersil ISL6590 controller offers intelligent digital, multi-phase control that provides high bandwidth, optimal control frequency response, noise immunity and active transient response control algorithms. The design is fully scalable for controlling up to six phases, each featuring the Intersil ISL6580 intelligent power stage. The user can configure and monitor the power system via the Asynchronous Serial Interface ASI . The ISL6590 controller flexibility can be extended with the addition of an external EEPROM for updating key circuit operating parameters in the control loop and overall system design. The digital architecture reduces the design time for engineers with the use of our software. The software allows the designer the freedom to choose output stage components and still achieve optimized system performance. The ISL6590 digital controller communicates with the ISL6580 integrated power stages via 100% digital signaling. Serial communication allows for separation of the controller and the power stage, providing placement and layout freedom to the power stage. The digital controller implements phase balancing to ensure even distribution of phase currents. The ISL6590 controller configures the ISL6580 power stage current limit, VID reference, nonoverlap period, Active Transient Response ATR trigger levels and maximum temperature limit. The digital controller also monitors the ISL6580 power stage peak currents, overtemperature fault, input under voltage, output over/under voltage to ensure proper operation of the power supply. Pinout ISL6590 QFN TOP VIEW PLL_FILTER PLL_ANALOG_VDD PLL_ANALOG_VSS PLL_DIGITAL_VDD PLL_DIGITAL_VSS OSC_IN OSC_OUT VDD_CORE ARX ATX VDD_IO SCLK SDATA TEST4 TEST3 ATRH OUTEN 64 01 VID [0] VID [1] VID [2] VID [3] VID [4] VID [5] VDD_CORE PWRGD VDD_IO MCLK NDRIVE1 PWM1 16 17 49 48 TEST 2 ATRL VDD_IO SYS_CLK VDD_IO VDD_CORE IDIG6 PWM6 NDRIVE6 33 32 TEST1 • Open Architecture features software programmable control loop compensation enabling optimal system performance - User accessible asynchronous serial interface • Intel VR10 - 6-bit Dynamic VID - Output voltage regulation range of 0.8375V to 1.600Vdc • 250kHz to 1MHz switching frequency Ordering Information PART NUMBER TEMP. oC PACKAGE PKG. NO. ISL6590DR 0 to 85 64 Ld 9x9 QFN L64.9x9-S IDIG1 NDRIVE2 PWM2 IDIG2 VDD_CORE NDRIVE3 PWM3 IDIG3 VDD_IO NDRIVE4 PWM4 IDIG4 EXT_RESETB NDRIVE5 PWM5 IDIG5 CCAUTION These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and design is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Dynamic VID is a trademark of Intersil Americas Inc. ISL6590 Typical Application Circuit VDD_IO VDD_CORE V ID[0:5] PW RG D OUTEN A RX ATX ERR SOC SCLK SDA TA SY SCLK PW M IDIG NDRIV E ISL6590 A TRH A TRL OSC_IN OSC_OUT TEST1 TEST2 TEST3 TEST4 PW M IDIG NDRIV E MDO MDI MCS MCLK PW M IDIG NDRIV E V 5-12 V 12 V VDD VDRIVEVCC V REF A TRH A TRL V SENP V SENN ISL6580 ERR SOC IS ENS E SCLK SDA TA NGA TE PW M IDIG NDRIV E PGND GND R EGU L ATI ON C H AN N EL V 5-12 V 12 V VDD VDRIVEVCC |
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