RD38F1020W0YTQ0SB93

RD38F1020W0YTQ0SB93 Datasheet

RD3 8 F 1 0 2 0W0YTQ0

Part	Datasheet
RD38F1020W0YTQ0SB93	RD38F1020W0YTQ0SB93 (pdf)

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Wireless Flash Memory W18 SCSP 32-Mbit W18 + 8-Mbit SRAM 38F1020W0YTQ0, 38F1020W0YBQ0 Datasheet Product Features • Flash Architecture Flexible, Multi-Partition, Dual-Operation Read-While-Write / Read-While-Erase 8 Partitions, 4 Mbits each 7 Main Partitions, 8 Main Blocks each 1 Parameter Partition, 8 Parameter + 7 Main Blocks 32-KWord Main Blocks, 4-KWord Parameter Blocks Top and Bottom Parameter Configuration • Flash Performance 65 ns Initial Access Speed 25 ns Page-Mode Read Speed 4-Word Page 14 ns Burst-Mode Read Speed 4-, 8-, 16- or Continuous-Word Burst Modes Burst- and Page-Mode Reads in Parameter and Main Partitions Burst Suspend Burst-Mode Reads can Traverse Partition Boundaries Programmable WAIT Polarity Enhanced Factory Programming µs/ Word typ • Flash Data Protection Absolute Protection with VPP and WP# Individual Dynamic Zero-Latency Block Locking Individual Block Lock-Down Erase/Program Lockout during Power Transitions • Flash Protection Register 64 Unique Device Identifier Bits 64 User-Programmable OTP Bits • Flash Automation Suspend Operations Erase Suspend to Program or Read Program Suspend to Read 5 µs typ Program/Erase Suspend Latency • Flash Software Flash Data Integrator FDI Optimized Common Flash Interface CFI • SCSP Architecture 32-Mbit Flash die + 8-Mbit SRAM die Reduces Board Space Requirement Simplifies PCB Design Complexity Easy Migration to Future SCSP Devices • SCSP Voltage V to V VCC/VCCQ and S-VCC • SCSP Packaging mm Ball-Pitch SCSP Area 8x10 mm, Height mm max 88-Ball 8 x 10 Matrix 80 Active Balls with 2 Support Balls at Each Corner • SRAM Architecture and Performance 70 ns Access Time Low-Voltage Data Retention Mode • Flash Quality and Reliability Extended Temperature °C to +85 °C Minimum 100,000 Block Erase Cycles µm ETOXTM VIII Process Technology Notice This document contains information available at the time of its release. The specifications are subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design. 252635-002 May 2004 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The 38F1020W0YTQ0 device may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800548-4725 or by visiting Intel's website at Copyright Intel Corporation, *Other names and brands may be claimed as the property of others. Datasheet 38F1020W0YTQ0, 38F1020W0YBW0 Contents Introduction Nomenclature Conventions Functional Overview Block Diagram Package Information 88-Ball Mechanical Ballout and Signal Description Signal Maximum Ratings and Operating Conditions Absolute Maximum Operating Capacitance Electrical Specifications DC Characteristics AC Characteristics Flash AC SRAM AC Characteristics Power and Reset Specifications Device Flash Read Operations Flash Program Operations Flash Program and Erase Operations Flash Security Modes Flash Set Configuration Register Appendix A Write State Appendix B Common Flash Appendix C Additional Information Appendix D Ordering Information Datasheet 38F1020W0YTQ0, 38F1020W0YBW0 2/12/03 9/03 5/04 Version -001 -002 -002 Original SCSP release. Added number column to flash and RAM AC tables and updated title. Reformated the datasheet according to the new layout. Datasheet 38F1020W0YTQ0, 38F1020W0YBQ0 Introduction This document contains information pertaining to the Wireless Flash Memory W18 SCSP 32-Mbit W18 + 8-Mbit SRAM SCSP device 38F1020W0YTQ0 and 38F1020W0YBQ0 . The intent of this datasheet is to provide information about this SCSP device where it may differ from the discrete Wireless Flash memory W18 device. Refer to the Wireless Flash Memory W18 Datasheet order number 290701 for information not provided by this document. Nomenclature 0x k M Byte Word Kword Mbits SCSP Hexadecimal prefix 1000 1,000,000 8 bits 16 bits 1024 words 1,048,576 bits Stacked Chip Scale Package Conventions Device Term used interchangeably throughout this document to denote either a particular die or both die in the package. VCC or VPP vs. VCC or VPP When the reference is to signal or package connection name, the notation will be VCC or VPP. When the reference is to timing or level, the notation will be subscripted e.g., VCC or VPP . R-OE#, R-LB#, R-UB#, R-WE# Used to identify OE#, LB#, UB#, WE#, RAM signals. Datasheet 38F1020W0YTQ0, 38F1020W0YBQ0 Functional Overview This section provides an overview of the features of the 38F1020W0YTQ0 and 38F1020W0YBQ0 devices. The 38F1020W0YTQ0 and 38F1020W0YBQ0 devices combine one flash and one SRAM die into a single package. Please refer to the discrete W18 datasheet for a complete overview of the flash product features. Block Diagram Figure 1 contains the block diagram of the 38F1020W0YTQ0 and 38F1020W0YBQ0 devices. Refer to Table 1, “Signal Descriptions” on page 10 for a description of each signal shown. Figure Block Diagram VCC OE#1 CE#1 CLK ADV# WP# RST# A[20:19] A[18:0] 28F320W18 Flash VCCQ WE# VPP WAIT D[15:0] S-VCC S-CS1 S-CS2 R-OE# 8-Mbit SRAM R-WE# R-UB# R-LB# Datasheet 38F1020W0YTQ0, 38F1020W0YBQ0 Package Information 88-Ball Mechanical Specification Datasheet 38F1020W0YTQ0, 38F1020W0YBQ0 Appendix D Ordering Information Figure Ordering Information Flash #1 Flash #2 RAM #1 RAM #2 Flash #1 Flash #2 RD3 8 F 1 0 2 0W0YTQ0 Package RD = Stacked-CSP Product Line Designator 38F = Flash memory + xRAM Flash Density Flash #1 = 1 = 32 Mbit Flash #2 = 0 = No Die RAM Density RAM #1 = 2 = 8 Mbit RAM #2 = 0 = No Die Product Family W = Wireless Flash memory Flash #1 = W Flash #2 = No Die Device Details 0 = Original version of this product Flash Speed = 65 ns Flash Process = µm VCCQ = V to 1.95V Size = 8 x 10 x mm RAM #1 = SRAM Speed = 70 ns Pinout Indicator Q = Quad pinout. Parameter Location T = Top Parameter B = Bottom Parameter Voltage Y = 18 Line Item W18 = 1.8V core, 1.8V I/O Datasheet

PDF Datasheet Preview

Wireless Flash Memory W18 SCSP
32-Mbit W18 + 8-Mbit SRAM 38F1020W0YTQ0, 38F1020W0YBQ0

Datasheet

Product Features
• Flash Architecture Flexible, Multi-Partition, Dual-Operation Read-While-Write / Read-While-Erase 8 Partitions, 4 Mbits each 7 Main Partitions, 8 Main Blocks each 1 Parameter Partition, 8 Parameter + 7 Main Blocks 32-KWord Main Blocks, 4-KWord Parameter Blocks Top and Bottom Parameter Configuration
• Flash Performance 65 ns Initial Access Speed 25 ns Page-Mode Read Speed 4-Word Page 14 ns Burst-Mode Read Speed 4-, 8-, 16- or Continuous-Word Burst Modes Burst- and Page-Mode Reads in Parameter and Main Partitions Burst Suspend Burst-Mode Reads can Traverse Partition Boundaries Programmable WAIT Polarity Enhanced Factory Programming µs/ Word typ
• Flash Data Protection

Absolute Protection with VPP and WP#

Individual Dynamic Zero-Latency Block Locking

Individual Block Lock-Down

Erase/Program Lockout during Power Transitions
• Flash Protection Register 64 Unique Device Identifier Bits
64 User-Programmable OTP Bits
• Flash Automation Suspend Operations Erase Suspend to Program or Read Program Suspend to Read
5 µs typ Program/Erase Suspend Latency
• Flash Software Flash Data Integrator FDI Optimized

Common Flash Interface CFI
• SCSP Architecture
32-Mbit Flash die + 8-Mbit SRAM die Reduces Board Space Requirement Simplifies PCB Design Complexity Easy Migration to Future SCSP Devices
• SCSP Voltage V to V VCC/VCCQ and S-VCC
• SCSP Packaging mm Ball-Pitch SCSP Area 8x10 mm, Height mm max 88-Ball 8 x 10 Matrix 80 Active Balls with 2 Support Balls at Each Corner
• SRAM Architecture and Performance 70 ns Access Time Low-Voltage Data Retention Mode
• Flash Quality and Reliability Extended Temperature °C to +85 °C Minimum 100,000 Block Erase Cycles µm ETOXTM VIII Process Technology

Notice This document contains information available at the time of its release. The specifications are subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design.
252635-002 May 2004

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The 38F1020W0YTQ0 device may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800548-4725 or by visiting Intel's website at

Copyright Intel Corporation,
*Other names and brands may be claimed as the property of others.

Datasheet
38F1020W0YTQ0, 38F1020W0YBW0

Contents

Introduction

Nomenclature Conventions

Functional Overview

Block Diagram

Package Information
88-Ball Mechanical

Ballout and Signal Description

Signal

Maximum Ratings and Operating Conditions

Absolute Maximum Operating Capacitance

Electrical Specifications

DC Characteristics

AC Characteristics

Flash AC SRAM AC Characteristics

Power and Reset Specifications

Device

Flash Read Operations

Flash Program Operations

Flash Program and Erase Operations

Flash Security Modes

Flash Set Configuration Register
Appendix A Write State Appendix B Common Flash Appendix C Additional Information Appendix D Ordering Information

Datasheet
38F1020W0YTQ0, 38F1020W0YBW0
2/12/03 9/03 5/04

Version
-001 -002 -002

Original SCSP release. Added number column to flash and RAM AC tables and updated title. Reformated the datasheet according to the new layout.

Datasheet
38F1020W0YTQ0, 38F1020W0YBQ0

Introduction

This document contains information pertaining to the Wireless Flash Memory W18 SCSP 32-Mbit W18 + 8-Mbit SRAM SCSP device 38F1020W0YTQ0 and 38F1020W0YBQ0 . The intent of this datasheet is to provide information about this SCSP device where it may differ from the discrete Wireless Flash memory W18 device. Refer to the Wireless Flash Memory W18 Datasheet order number 290701 for information not provided by this document.

Nomenclature
0x k M Byte Word Kword Mbits SCSP

Hexadecimal prefix 1000 1,000,000 8 bits 16 bits 1024 words 1,048,576 bits Stacked Chip Scale Package

Conventions

Device Term used interchangeably throughout this document to denote either a particular die or both die in the package.

VCC or VPP vs. VCC or VPP When the reference is to signal or package connection name, the notation will be VCC or VPP. When the reference is to timing or level, the notation will be subscripted e.g., VCC or VPP .

R-OE#, R-LB#, R-UB#, R-WE# Used to identify OE#, LB#, UB#, WE#, RAM signals.

Datasheet
38F1020W0YTQ0, 38F1020W0YBQ0

Functional Overview

This section provides an overview of the features of the 38F1020W0YTQ0 and 38F1020W0YBQ0 devices.

The 38F1020W0YTQ0 and 38F1020W0YBQ0 devices combine one flash and one SRAM die into a single package. Please refer to the discrete W18 datasheet for a complete overview of the flash product features.

Block Diagram

Figure 1 contains the block diagram of the 38F1020W0YTQ0 and 38F1020W0YBQ0 devices. Refer to Table 1, “Signal Descriptions” on page 10 for a description of each signal shown.

Figure Block Diagram

VCC OE#1 CE#1

CLK ADV# WP# RST# A[20:19]

A[18:0]
28F320W18 Flash

VCCQ WE# VPP WAIT

D[15:0]

S-VCC S-CS1 S-CS2 R-OE#
8-Mbit SRAM

R-WE# R-UB# R-LB#

Datasheet
38F1020W0YTQ0, 38F1020W0YBQ0

Package Information
88-Ball Mechanical Specification

Datasheet
38F1020W0YTQ0, 38F1020W0YBQ0
Appendix D Ordering Information
Figure Ordering Information

Flash #1 Flash #2 RAM #1 RAM #2 Flash #1 Flash #2

RD3 8 F 1 0 2 0W0YTQ0

Package

RD = Stacked-CSP

Product Line Designator
38F = Flash memory + xRAM

Flash Density

Flash #1 = 1 = 32 Mbit Flash #2 = 0 = No Die

RAM Density

RAM #1 = 2 = 8 Mbit RAM #2 = 0 = No Die

Product Family

W = Wireless Flash memory Flash #1 = W Flash #2 = No Die

Device Details
0 = Original version of this product Flash Speed = 65 ns Flash Process = µm VCCQ = V to 1.95V Size = 8 x 10 x mm RAM #1 = SRAM Speed = 70 ns

Pinout Indicator

Q = Quad pinout.

Parameter Location

T = Top Parameter B = Bottom Parameter

Voltage

Y = 18 Line Item W18 = 1.8V core, 1.8V I/O

Datasheet

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Datasheet ID: RD38F1020W0YTQ0SB93 638921