MC100ES6017EGR2

MC100ES6017EGR2 Datasheet

The MC100ES6017 is a V ECL/PECL quad differential receiver. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled down to VEE. This operation will force the Q output LOW and ensure stability.

Part	Datasheet
MC100ES6017EGR2	MC100ES6017EGR2 (pdf)

Related Parts	Information
MC100ES6017EG	MC100ES6017EG

PDF Datasheet Preview
Freescale Semiconductor Technical Data V ECL/PECL Quad Differential Receiver The MC100ES6017 is a V ECL/PECL quad differential receiver. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled down to VEE. This operation will force the Q output LOW and ensure stability. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a µF capacitor and limit current sourcing or sinking to mA. When not used, VBB should be left open. • High bandwidth output transitions • LVPECL operating range VCC = V to V • Internal input pulldown resistors on D inputs, pullup and pulldown resistors on D inputs • 20 lead SOIC package • Ambient temperature range -40°C to +85°C • 20-lead Pb-free package available MC100ES6017 ECL/PECL QUAD DIFFERENTIAL RECEIVER DW SUFFIX 20-LEAD SOIC PACKAGE CASE 751D-07 VCC Q0 20 19 Q0 Q1 18 17 16 Q2 Q3 VEE 15 14 13 12 11 12 VCC D0 3 4 5 6 7 8 9 10 D0 D1 D2 D3 VBB Figure 20-Lead Pinout Top View and Logic Diagram EG SUFFIX 20-LEAD SOIC PACKAGE Pb-FREE PACKAGE CASE 751D-07 ORDERING INFORMATION Device Package MC100ES6017DW SO-20 MC100ES6017DWR2 SO-20 MC100ES6017EG SO-20 Pb-Free MC100ES6017EGR2 SO-20 Pb-Free PIN DESCRIPTION Function Dn, Dn ECL Differential Data Inputs Qn, Qn ECL Differential Data Outputs Reference Voltage Output Positive Supply Negative Supply Freescale Semiconductor, Inc., All rights reserved. Table General Specifications Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Characteristics Thermal Resistance Junction to Ambient Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Human Body Model Machine Model Charged Device Model 0 LFPM, 20 SOIC 500 LFPM, 20 SOIC Value > 2000 V > 200 V > 1500 V 90 °C/W 60 °C/W Table Absolute Maximum Ratings 1 Parameter Conditions Rating Unit VSUPPLY VIN Power Supply Voltage Input Voltage IOUT Output Current difference between VCC & VEE VCC - VEE V Continuous Surge VCC + VEE -

PDF Datasheet Preview

Freescale Semiconductor Technical Data

V ECL/PECL Quad Differential Receiver

The MC100ES6017 is a V ECL/PECL quad differential receiver. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled down to VEE. This operation will force the Q output LOW and ensure stability.

For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a µF capacitor and limit current sourcing or sinking to mA. When not used, VBB should be left open.
• High bandwidth output transitions
• LVPECL operating range VCC = V to V
• Internal input pulldown resistors on D inputs, pullup and pulldown resistors on

D inputs
• 20 lead SOIC package
• Ambient temperature range -40°C to +85°C
• 20-lead Pb-free package available

MC100ES6017

ECL/PECL QUAD DIFFERENTIAL RECEIVER

DW SUFFIX 20-LEAD SOIC PACKAGE

CASE 751D-07

VCC Q0 20 19

Q0 Q1 18 17 16

Q2 Q3 VEE 15 14 13 12 11
12 VCC D0
3 4 5 6 7 8 9 10 D0 D1 D2 D3 VBB

Figure 20-Lead Pinout Top View and Logic Diagram

EG SUFFIX 20-LEAD SOIC PACKAGE

Pb-FREE PACKAGE CASE 751D-07
ORDERING INFORMATION

Device

Package

MC100ES6017DW

SO-20

MC100ES6017DWR2

SO-20

MC100ES6017EG

SO-20 Pb-Free

MC100ES6017EGR2 SO-20 Pb-Free

PIN DESCRIPTION

Function

Dn, Dn ECL Differential Data Inputs

Qn, Qn ECL Differential Data Outputs

Reference Voltage Output

Positive Supply

Negative Supply

Freescale Semiconductor, Inc., All rights reserved.

Table General Specifications

Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection

Characteristics

Thermal Resistance Junction to Ambient

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

Human Body Model Machine Model Charged Device Model
0 LFPM, 20 SOIC 500 LFPM, 20 SOIC

Value
> 2000 V > 200 V > 1500 V
90 °C/W 60 °C/W

Table Absolute Maximum Ratings 1

Parameter

Conditions

Rating

Unit

VSUPPLY VIN

Power Supply Voltage Input Voltage

IOUT

Output Current
difference between VCC & VEE VCC - VEE V

Continuous Surge

VCC +

VEE -

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MC100ES6017EGR2 Datasheet file may be downloaded here without warranties.

Datasheet ID: MC100ES6017EGR2 637423