IDTCV152PVG

IDTCV152PVG Datasheet

IDTCV152 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

Part	Datasheet
IDTCV152PVG	IDTCV152PVG (pdf)

Related Parts	Information
IDTCV152PVG8	IDTCV152PVG8

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IDTCV152 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR COMMERCIAL TEMPERATURE RANGE PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR IDTCV152 FEATURES: • One high precision PLL for CPU, SSC, and N programming • One high precision PLL for SRC/PCI, SSC, and N programming • One high precision PLL for 48MHz • Band-gap circuit for differential outputs • Support spread spectrum modulation, down spread and others • Support SMBus block read/write, index read/write • Selectable output strength for REF, 48MHz, PCI • Allows for CPU frequency to change to a higher frequency for maximum system computing power • Available in SSOP and TSSOP packages DESCRIPTION: IDTCV152 is a 56 pin clock device, compliant with Intel CK410B specification.The CPU output buffer is designed to support up to 400MHz processor. This chip has three PLLs inside for CPU, SRC/PCI, and 48MHz IO clocks. This device also implements Band-gap referenced IREF to reduce the impact of VDD variation on differential outputs, which can provide more robust system performance. Each CPU and SRC/PCI has its own Spread Spectrum selection, which allows for isolated changes instead of affecting other clock groups. OUTPUTS: • 50.7V current differential CPU CLK pair • 40.7V current differential SRC CLK pair • 7PCI, 3 free running, 33.3MHz • 148MHz • 2*REF KEY SPECIFICATION: • CPU CLK cycle to cycle jitter < 85ps • SRC CLK cycle to cycle jitter < 100ps • PCI CLK cycle to cycle jitter < 250ps FUNCTIONAL BLOCK DIAGRAM XTAL_IN XTAL_OUT SDATA SCLK XTAL Osc Amp SM Bus Controller VTT_PWRGD#/PD FSA.B.C Control Logic PLL1 SSC N Programmable PLL2 SSC N Programmable PLL3 CPU CLK Output Buffers Stop Logic IREF SRC CLK Output Buffer Stop Logic IREF 48MHz Output BUffer CPU[4:0] REF[1:0] SRC[4:1] PCI[3:0], PCIF[2:0] 48MHz The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE 2005 Integrated Device Technology, Inc. MAY 2005 DSC 6537/5 IDTCV152 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR PIN CONFIGURATION VDD_PCI 1 VSS_PCI 2 ORDERING INFORMATION IDTCV XXX Device Type Package X Grade COMMERCIAL TEMPERATURE RANGE Blank Commercial Temperature Range 0°C to +70°C PA PAG PV PVG Thin Small Shrink Outline Package TSSOP - Green Small Shrink Outline Package SSOP - Green 152 Programmable FlexPC Clock for P4 Processor CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for Tech Support:

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IDTCV152 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

COMMERCIAL TEMPERATURE RANGE

PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

IDTCV152

FEATURES:
• One high precision PLL for CPU, SSC, and N programming
• One high precision PLL for SRC/PCI, SSC, and N programming
• One high precision PLL for 48MHz
• Band-gap circuit for differential outputs
• Support spread spectrum modulation, down spread and
others
• Support SMBus block read/write, index read/write
• Selectable output strength for REF, 48MHz, PCI
• Allows for CPU frequency to change to a higher frequency for
maximum system computing power
• Available in SSOP and TSSOP packages

DESCRIPTION:

IDTCV152 is a 56 pin clock device, compliant with Intel CK410B specification.The CPU output buffer is designed to support up to 400MHz processor. This chip has three PLLs inside for CPU, SRC/PCI, and 48MHz IO clocks. This device also implements Band-gap referenced IREF to reduce the impact of VDD variation on differential outputs, which can provide more robust system performance. Each CPU and SRC/PCI has its own Spread Spectrum selection, which allows for isolated changes instead of affecting other clock groups.

OUTPUTS:
• 5*0.7V current differential CPU CLK pair
• 4*0.7V current differential SRC CLK pair
• 7*PCI, 3 free running, 33.3MHz
• 1*48MHz
• 2*REF

KEY SPECIFICATION:
• CPU CLK cycle to cycle jitter < 85ps
• SRC CLK cycle to cycle jitter < 100ps
• PCI CLK cycle to cycle jitter < 250ps

FUNCTIONAL BLOCK DIAGRAM

XTAL_IN XTAL_OUT

SDATA SCLK

XTAL Osc Amp

SM Bus Controller

VTT_PWRGD#/PD FSA.B.C

Control Logic

PLL1 SSC N Programmable

PLL2 SSC N Programmable

PLL3

CPU CLK Output Buffers

Stop Logic

IREF

SRC CLK Output Buffer

Stop Logic

IREF
48MHz Output BUffer

CPU[4:0] REF[1:0] SRC[4:1] PCI[3:0], PCIF[2:0]
48MHz

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE
2005 Integrated Device Technology, Inc.

MAY 2005

DSC 6537/5

IDTCV152 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

PIN CONFIGURATION

VDD_PCI 1 VSS_PCI 2
ORDERING INFORMATION

IDTCV XXX

Device Type Package

X Grade

COMMERCIAL TEMPERATURE RANGE

Blank Commercial Temperature Range 0°C to +70°C

PA PAG PV PVG

Thin Small Shrink Outline Package TSSOP - Green Small Shrink Outline Package SSOP - Green
152 Programmable FlexPC Clock for P4 Processor

CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138
for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775
for Tech Support:

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived IDTCV152PVG Datasheet file may be downloaded here without warranties.

Datasheet ID: IDTCV152PVG 637406