IDT8535-01PGG8

IDT8535-01PGG8 Datasheet

IDT8535-01 LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL

Part	Datasheet
IDT8535-01PGG8	IDT8535-01PGG8 (pdf)

Related Parts	Information
8535-01PGGI	8535-01PGGI
IDT8535-01PGG	IDT8535-01PGG
8535-01PGGI8	8535-01PGGI8

PDF Datasheet Preview
IDT8535-01 LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL FANOUT BUFFER IDT8535-01 FEATURES: • Four differential 3.3V LVPECL outputs • Selectable CLK0 or CLK1 inputs for redundant and multiple frequency fanout applications • Maximum output frequency 266MHz • CLK0 or CLK1 can accept LVCMOS or LVTTL input levels • Translates LVCMOS and LVTTL levels to 3.3V LVPECL levels • Output skew 30ps max. • Part-to-part skew as low as 150ps • Propagation delay 1.9ns max. • 3.3V operating supply • Available in TSSOP package DESCRIPTION: The IDT8535-01 is a low skew, high performance 1-to-4 LVCMOS-to-3.3V LVPECL fanout buffer. It has two single-ended clock inputs. The single-ended clock input accepts LVCMOS or LVTTL input levels and translates them to 3.3V LVPECL levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the IDT853501 ideal for those applications demanding well-defined performance and repeatability. FUNCTIONAL BLOCK DIAGRAM CLK_EN CLK0 CLK1 CLK_SEL The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL c 2004 Integrated Device Technology, Inc. TEMPERATURE 1 RANGES Q0 xQ0 Q1 xQ1 Q2 xQ2 Q3 xQ3 AUGUST 2004 DSC 6196/7 IDT8535-01 LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL PIN CONFIGURATION CLK_EN CLK_SEL CLK0 CLK1 TSSOP TOP VIEW COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS 1 Symbol VDD VI VO Description Power Supply Voltage Input Voltage Output Voltage Package Thermal Impedance 0 lfpm Unit to VDD+0.5 V to VDD+0.5 V °C/W TSTG Storage Temperature to +150 °C NOTE Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. ORDERING INFORMATION Device Type Package Process COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Blank I Commercial 0°C to +70°C Industrial -40°C to +85°C Thin Shrink Small Outline Package 8535-01 Low Skew, 1-to-4 LVCMOS-to-3.3V LVPECL Fanout Buffer CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES 800-345-7015 or 408-727-6116 fax 408-492-8674 for Tech Support 408 654-6459

PDF Datasheet Preview

IDT8535-01 LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL FANOUT BUFFER

IDT8535-01

FEATURES:
• Four differential 3.3V LVPECL outputs
• Selectable CLK0 or CLK1 inputs for redundant and multiple
frequency fanout applications
• Maximum output frequency 266MHz
• CLK0 or CLK1 can accept LVCMOS or LVTTL input levels
• Translates LVCMOS and LVTTL levels to 3.3V LVPECL levels
• Output skew 30ps max.
• Part-to-part skew as low as 150ps
• Propagation delay 1.9ns max.
• 3.3V operating supply
• Available in TSSOP package

DESCRIPTION:

The IDT8535-01 is a low skew, high performance 1-to-4 LVCMOS-to-3.3V LVPECL fanout buffer. It has two single-ended clock inputs. The single-ended clock input accepts LVCMOS or LVTTL input levels and translates them to 3.3V LVPECL levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make the IDT853501 ideal for those applications demanding well-defined performance and repeatability.

FUNCTIONAL BLOCK DIAGRAM CLK_EN

CLK0

CLK1

CLK_SEL

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL
c 2004 Integrated Device Technology, Inc.

TEMPERATURE 1

RANGES

Q0 xQ0 Q1 xQ1 Q2 xQ2 Q3 xQ3

AUGUST 2004

DSC 6196/7

IDT8535-01 LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL

PIN CONFIGURATION

CLK_EN

CLK_SEL

CLK0

CLK1

TSSOP TOP VIEW

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

ABSOLUTE MAXIMUM RATINGS 1

Symbol VDD VI VO

Description Power Supply Voltage Input Voltage Output Voltage Package Thermal Impedance 0 lfpm

Unit
to VDD+0.5 V
to VDD+0.5 V
°C/W

TSTG Storage Temperature
to +150 °C

NOTE Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability.
ORDERING INFORMATION

Device Type Package Process

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

Blank I

Commercial 0°C to +70°C Industrial -40°C to +85°C

Thin Shrink Small Outline Package
8535-01 Low Skew, 1-to-4 LVCMOS-to-3.3V LVPECL Fanout Buffer

CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
for SALES 800-345-7015 or 408-727-6116 fax 408-492-8674
for Tech Support 408 654-6459

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived IDT8535-01PGG8 Datasheet file may be downloaded here without warranties.

Datasheet ID: IDT8535-01PGG8 637397