IDT74LVC273APGG8

IDT74LVC273APGG8 Datasheet

IDT74LVC273A 3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET

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IDT74LVC273APGG8	IDT74LVC273APGG8 (pdf)

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IDT74LVC273APGG	IDT74LVC273APGG

PDF Datasheet Preview
IDT74LVC273A 3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET 3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET, POSITIVE EDGE TRIGGER, AND 5 VOLT TOLERANT I/O INDUSTRIAL TEMPERATURE RANGE IDT74LVC273A FEATURES: • MICRON CMOS Technology • ESD > 2000V per MIL-STD-883, Method 3015 > 200V using machine model C = 200pF, R = 0 • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels W typ. static • Rail-to-rail output swing for increased noise margin • All inputs, outputs, and I/O are 5V tolerant • Supports hot insertion • Available in SSOP and TSSOP packages DESCRIPTION: The octal D-type flip-flop with reset, positive edge trigger is built using advanced dual metal CMOS technology. This high-speed, low power device is ideal for driving high capacitance loads such as memory address and data buses. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system. DRIVE FEATURES: • High Output Drivers ±24mA • Reduced system switching noise APPLICATIONS: • 5V and 3.3V mixed voltage systems • Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM Dx D Q The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 2006 Integrated Device Technology, Inc. OCTOBER 2008 DSC-4595/4 IDT74LVC273A 3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET PIN CONFIGURATION CLR O0 D0 D1 O1 O2 D2 D3 O3 SSOP/ TSSOP TOP VIEW INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS 1 Unit VTERM Terminal Voltage with Respect to GND to TSTG Storage Temperature to +150 IOUT DC Output Current to +50 Continuous Clamp Current, VI < 0 or VO < 0 Continuous Current through each VCC or GND ±100 NOTE Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE TA = +25°C, F = 1.0MHz ORDERING INFORMATION LVC X XXXX Temp. Range Bus-Hold Device Type Package INDUSTRIAL TEMPERATURE RANGE PY PYG PG PGG Shrink Small Outline Package SSOP - Green Thin Shrink Small Outline Package TSSOP - Green 273A Octal D-Type Flip-Flop with Reset, Positive Edge Trigger, 5V Tolerant I/O Blank No Bus-hold 74 -40°C to +85°C CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for Tech Support:

PDF Datasheet Preview

IDT74LVC273A 3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET
3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET, POSITIVE EDGE TRIGGER, AND 5 VOLT TOLERANT I/O

INDUSTRIAL TEMPERATURE RANGE

IDT74LVC273A

FEATURES:
• MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015 > 200V using
machine model C = 200pF, R = 0
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels W typ. static
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP and TSSOP packages

DESCRIPTION:

The octal D-type flip-flop with reset, positive edge trigger is built using advanced dual metal CMOS technology. This high-speed, low power device is ideal for driving high capacitance loads such as memory address and data buses.

All pins can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system.

DRIVE FEATURES:
• High Output Drivers ±24mA
• Reduced system switching noise

APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems

FUNCTIONAL BLOCK DIAGRAM

Dx D Q

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE
2006 Integrated Device Technology, Inc.

OCTOBER 2008

DSC-4595/4

IDT74LVC273A 3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET

PIN CONFIGURATION

CLR O0 D0 D1 O1 O2 D2 D3 O3

SSOP/ TSSOP TOP VIEW

INDUSTRIAL TEMPERATURE RANGE

ABSOLUTE MAXIMUM RATINGS 1

Unit

VTERM Terminal Voltage with Respect to GND to

TSTG Storage Temperature
to +150

IOUT DC Output Current
to +50

Continuous Clamp Current,

VI < 0 or VO < 0

Continuous Current through each

VCC or GND
±100

NOTE Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

CAPACITANCE TA = +25°C, F = 1.0MHz
ORDERING INFORMATION

LVC X

XXXX

Temp. Range Bus-Hold Device Type Package

INDUSTRIAL TEMPERATURE RANGE

PY PYG PG PGG

Shrink Small Outline Package SSOP - Green Thin Shrink Small Outline Package TSSOP - Green
273A Octal D-Type Flip-Flop with Reset, Positive Edge Trigger, 5V Tolerant I/O

Blank No Bus-hold
74 -40°C to +85°C

CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138
for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775
for Tech Support:

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived IDT74LVC273APGG8 Datasheet file may be downloaded here without warranties.

Datasheet ID: IDT74LVC273APGG8 637379