MAX3679CTJ+T

MAX3679CTJ+T Datasheet


MAX3679

Part Datasheet
MAX3679CTJ+T MAX3679CTJ+T MAX3679CTJ+T (pdf)
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MAX3679
+3.3V, Low-Jitter Crystal to LVPECL Clock Generator

The MAX3679 is a low-jitter precision clock generator with the integration of three LVPECL and one LVCMOS outputs optimized for Ethernet applications. The device integrates a crystal oscillator and a phase-locked loop PLL clock multiplier to generate high-frequency clock outputs for Ethernet applications. Maxim’s proprietary PLL design features ultra-low jitter 0.36psRMS and excellent power-supply noise rejection, minimizing design risk for network equipment.

Ethernet Networking Equipment

Pin Configuration appears at end of data sheet.

Crystal Oscillator Interface 25MHz

CMOS Input 25MHz Output Frequencies for Ethernet
62.5MHz, 125MHz, 156.25MHz, 312.5MHz

Low Jitter 0.14psRMS 1.875MHz to 20MHz 0.36psRMS 12kHz to 20MHz

Excellent Power-Supply Noise Rejection No External Loop Filter Capacitor Required
Ordering Information

PART

TEMP RANGE

PIN-PACKAGE

MAX3679CTJ+
0°C to +70°C
32 TQFN-EP*
+Denotes a lead-free/RoHS-compliant package. *EP = Exposed pad.

Typical Application Circuit
0.1uF
0.1uF
0.1uF
0.01uF
0.1uF
+3.3V ±5%
10uF 0.1uF

VCCA MR REF_IN

VCCO_A

VCCO_B

IN_SEL QAC_OE QA_OE QB0_OE QB1_OE

MAX3679

BYPASS SELA1 SELA0 SELB1 SELB0 RES1 RES0

X_OUT

X_IN
25MHz CL = 18pF

VDDO_A 36Ω

QA_C 125MHz

Z0 = 50Ω

Z0 = 50Ω
125MHz

Z0 = 50Ω

Z0 = 50Ω
312.5MHz

Z0 = 50Ω

Z0 = 50Ω
312.5MHz GNDO_A
33pF
27pF

Z0 = 50Ω

ASIC

ASIC 50Ω 50Ω
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at

MAX3679
+3.3V, Low-Jitter Crystal to LVPECL Clock Generator

ABSOLUTE MAXIMUM RATINGS

Supply Voltage Range VCC, VCCA, VDDO_A, VCCO_A, VCCO_B ................................-0.3V to +4.0V

Voltage Range at REF_IN, IN_SEL, SELA[1:0], SELB[1:0], RES[1:0], QAC_OE, QA_OE, QB0_OE, QB1_OE, MR, BYPASS to VCC + 0.3V

Voltage Range at X_IN Pin ...................................-0.3V to +1.2V

Voltage Range at to +0.3V Voltage Range at X_OUT ............................-0.3V to VCC - 0.6V Current into QA_C Current into QA, QA, QB0, QB0, QB1, QB1 .....................-56mA Continuous Power Dissipation TA = +70°C
32-Pin TQFN derate 34.5mW/°C above +70°C .......2759mW Operating Junction Temperature Range ...........-55°C to +150°C Storage Temperature Range .............................-65°C to +160°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

VCC = +3.0V to +3.6V, TA = 0°C to +70°C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25°C, unless otherwise noted. Notes 1, 2, and 3

PARAMETER

CONDITIONS

Power-Supply Current

Note 4

CONTROL INPUT CHARACTERISTICS SELA[1:0], SELB[1:0], IN_SEL, QAC_OE, QA_OE, QB1_OE, QB0_OE, MR, BYPASS Pins

Input Capacitance Input Pulldown Resistor Input Logic Bias Resistor

CIN RPULLDOWN Pin MR

RBIAS Pins SELA[1:0], SELB[1:0], QB0_OE

Input Pullup Resistor

RPULLUP

Pins QAC_OE, QA_OE, QB1_OE, IN_SEL, BYPASS

LVPECL OUTPUT SPECIFICATIONS QA, QA, QB0, QB0, QB1, QB1 Pins

Output High Voltage

Output Low Voltage

Peak-to-Peak Output-Voltage Swing Single-Ended

Note 2

Clock Output Rise/Fall Time
20% to 80% Note 2

PLL enabled

Output Duty-Cycle Distortion

PLL bypassed Note 5

LVCMOS/LVTTL INPUT SPECIFICATIONS SELA[1:0], SELB[1:0], IN_SEL, QAC_OE, QA_OE, QB1_OE, QB0_OE, MR, BYPASS Pins

Input-Voltage High

Input-Voltage Low

Input High Current

VIN = VCC

Input Low Current

VIN = 0V

TYP 77
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Datasheet ID: MAX3679CTJ+T 647320