IDT74ALVCH16501PAG8
IDT74ALVCH16501PAG8 Datasheet
IDT74ALVCH16501 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
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IDT74ALVCH16501PAG8 |
IDT74ALVCH16501PAG8 (pdf) |
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| IDT74ALVCH16501 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCH16501 FEATURES: • MICRON CMOS Technology • Typical tSK o Output Skew < 250ps • ESD > 2000V per MIL-STD-883, Method 3015 > 200V using machine model C = 200pF, R = 0 • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels W typ. static • Rail-to-Rail output swing for increased noise margin • Available in SSOP and TSSOP packages DRIVE FEATURES: • High Output Drivers ±24mA • Suitable for heavy loads APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage computing systems DESCRIPTION: This 18-bit universal bus transceiver is built using advanced dual metal CMOS technology. Data flow in each direction is controlled by output-enable OEAB and OEBA , latch enable LEAB and LEBA , and clock CLKAB and CLKBA inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/ flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. Data flow for B to A is similiar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are complementary OEAB is active high and OEBA is active low . The ALVCH16501 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The ALVCH16501 has “bus-hold” which retains the inputs’ last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. FUNCTIONAL BLOCK DIAGRAM OEAB 1 CLKAB 55 LEAB 2 LEBA 28 CLKBA 30 OEBA 27 1D C1 CLK 1D C1 54 B1 TO 17 OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 2006 Integrated Device Technology, Inc. MAY 2006 DSC-4738/4 IDT74ALVCH16501 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION OEAB LEAB GND 18 OEBA LEBA 55 CLKAB 53 GND 46 GND 39 GND CLKBA ORDERING INFORMATION IDT XX ALVC X Temp. Range Bus-Hold Family Device Type Package INDUSTRIAL TEMPERATURE RANGE PV PVG PA PAG Shrink Small Outline Package SSOP - Green Thin Shrink Small Outline Package TSSOP - Green 18-Bit Universal Bus Transceiver with 3-State Outputs Double-Density, ±24mA Bus-Hold 40°C to +85°C CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for Tech Support: |
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