IDT2305B-1DC8
IDT2305B-1DC8 Datasheet
IDT2305B 3.3V ZERO DELAY CLOCK BUFFER
| Part | Datasheet |
|---|---|
IDT2305B-1DC8 |
IDT2305B-1DC8 (pdf) |
| Related Parts | Information |
|---|---|
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IDT2305B-1HDC8 |
IDT2305B-1HDC8 |
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IDT2305B-1HDC |
IDT2305B-1HDC |
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IDT2305B-1DCI |
IDT2305B-1DCI |
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IDT2305B-1HDCI |
IDT2305B-1HDCI |
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IDT2305B-1HDCI8 |
IDT2305B-1HDCI8 |
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IDT2305B-1DC |
IDT2305B-1DC |
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IDT2305B-1DCI8 |
IDT2305B-1DCI8 |
| PDF Datasheet Preview |
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| IDT2305B 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY CLOCK BUFFER IDT2305B FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew < 250ps • Low jitter <175 ps cycle-to-cycle • 50ps typical cycle-to-cycle jitter 15pF, 66MHz • IDT2305B-1 for Standard Drive • IDT2305B-1H for High Drive • No external RC network required • Operates at 3.3V VDD • Power down mode • Available in SOIC and TSSOP packages NOTE EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 DESCRIPTION: The IDT2305B is a high-speed phase-lock loop PLL clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305B is an 8-pin version of the IDT2309B. IDT2305B accepts one reference input, and drives out five low skew clocks. The -1H version of this device operates, up to 133MHz frequency and has a higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the IDT2305B enters power down. In this mode, the device will draw less than 25µA, the outputs are tri-stated, and the PLL is not running, resulting in a significant reduction of power. The IDT2305B is characterized for both Industrial and Commercial operation. FUNCTIONAL BLOCK DIAGRAM REF 1 PLL Control Logic 8 CLKOUT 3 CLK1 2 CLK2 5 CLK3 7 CLK4 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1 c 2010 Integrated Device Technology, Inc. JANUARY 2010 DSC 6994/5 IDT2305B 3.3V ZERO DELAY CLOCK BUFFER PIN CONFIGURATION REF CLK2 CLK1 GND SOIC/TSSOP TOP VIEW CLKOUT CLK4 VDD CLK3 APPLICATIONS: • SDRAM • Telecom • Datacom • PC Motherboards/Workstations • Critical Path Delay Designs COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS 1 Rating Max. Unit Supply Voltage Range Input Voltage Range REF to V Input Voltage Range ORDERING INFORMATION Device Type Package Process COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Blank I Commercial 0oC to +70oC Industrial -40oC to +85oC DC DCG PGG Small Outline SOIC - Green TSSOP - Green 2305B-1 Zero Delay Clock Buffer 2305B-1H High Drive Output *NOTE EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 2305B-1DC* 2305B-1DCG 2305B-1HDC* 2305B-1HDCG 2305B-1HDCGI 2305B-1HDCI* 2305B-1PGG 2305B-1PGGI Ordering Code 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 8-Pin TSSOP 8-Pin TSSOP Package Type Commercial Industrial Commercial Industrial Operating Range CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for Tech Support: |
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