LV810RI

LV810RI Datasheet

ICSLV810

Part	Datasheet
LV810RI	LV810RI (pdf)

Related Parts	Information
LV810FIT	LV810FIT
LV810RIT	LV810RIT
LV810FI	LV810FI

PDF Datasheet Preview
BUFFER/CLOCK DRIVER DATASHEET ICSLV810 The ICSLV810 is a low skew V to V, 1:10 fanout buffer. This device is specifically designed for data communications clock management. The large fanout from a single input line reduces loading on the input clock. The TTL level outputs reduce noise levels on the part. Typical applications are clock and signal distribution. • Packaged in 20-pin QSOP/SSOP • Split 1:10 fanout Buffer • Maximum skew between outputs of different packages • Max propagation delay of ns • Operating voltage of V to V on Bank A • Operating voltage of V to V on Banks B and C • Advanced, low power, CMOS process • Industrial temperature range -40° C to +85° C • V tolerant input when VDDA=2.5 V • Available in Pb lead free packaging NOTE EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Block Diagram CLKIN VDDA VDDB VDDC CLK 1 CLK 2 CLK 3 CLK 4 CLK 5 CLK 6 CLK 7 CLK 8 CLK 9 CLK 10 IDT / ICS BUFFER/CLOCK DRIVER ICSLV810 BUFFER/CLOCK DRIVER Pin Assignment CLKIN 1 GND 2 CLK 1 3 VDDA CLK 2 5 GND 6 CLK 3 7 VDDA 8 CLK 4 9 GND 10 20 VDDB 19 CLK 10 18 CLK 9 17 GND 16 CLK 8 15 VDDC 14 CLK 7 13 GND 12 CLK 6 11 CLK 5 20 pin 150mil SSOP Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Name CLKIN GND CLK1 VDDA CLK2 GND CLK3 VDDA CLK4 GND CLK5 CLK6 GND CLK7 VDDC CLK8 GND CLK9 CLK10 VDDB Pin Type Input Power Output Power Output Power Output Power Output Power Output Power Output Power Output Power Output Power Pin Description Clock input. Connect to ground. Clock output. Connect to - V. Clock output. Connect to ground. Clock output. Connect to - V. Clock output. Connect to ground. Clock output. Clock output. Connect to ground. Clock output. Connect to - V. Clock output. Connect to ground. Clock output. Clock output. Connect to - V. FAN OUT BUFFER IDT / ICS BUFFER/CLOCK DRIVER ICSLV810 BUFFER/CLOCK DRIVER FAN OUT BUFFER External Components The ICSLV810 requires a minimum number of external components for proper operation. Ordering Information E1 E A Symbol A A1 A2 b c D E E1 e L α Basic Basic *For reference only. Controlling dimensions in mm. SEATING PLANE L Part / Order Number LV810RI LV810RIT LV810FI LV810FIT LV810RILF LV810RILFT LV810FILF LV810FILFT Marking ICSLV810RI ICSLV810FI LV810RILF LV810FILF Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Package 20-pin QSOP 20-pin QSOP 20-pin SSOP 20-pin SSOP 20-pin QSOP 20-pin QSOP 20-pin SSOP 20-pin SSOP Temperature -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C NOTE EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems ICS assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. IDT / ICS BUFFER/CLOCK DRIVER ICSLV810 BUFFER/CLOCK DRIVER FAN OUT BUFFER P.Griffith 03/25/05 New device/datasheet. P.Griffith 05/02/05 Released from Preliminary to final changed Short Circuit Current parameter in V DC Char table to ±80 mA changed Short Circuit Current parameter in V DC Char table to ±35 mA P.Griffith 05/12/05 Added bullet in “Features” for operating voltage of V on Bank A and specified that operating voltages of and V are on Banks B and C changed block diagram input and pin 1 from IN to CLKIN removed V spec from pin 4 and pin 8 descriptions added “VDDA + V” to “All Inputs and Outputs” section of Absolute Maximum Ratings added min and max values for Banks A, B, and C “Power Supply Voltage” in Recommended Operating Conditions expanded DC Electrical Char tables in to include a separate table for Banks A, B, and C expanded AC Electrical Char tables in to include a separate table for Banks A, B, and C; P.Griffith 06/21/05 Added 209 mil 20-pin SSOP package and ordering info. E K. Beckmeyer 07/27/05 Specified operating voltage on Bank A from 1.5V to 2.5V Added figures 4 and 5 on page 10 to explain Pulse Skew and Part-to-Part Skew Changed Output Frequency Max Specification to 133MHz in AC Electrical Char tables for Banks A, B, and C Added Duty Cycle Spec for VDD = 1.5V in AC Electrical Char tables for Banks A, B, C Changed CLK conditions in DC Electrical Char tables on Banks B and C removed SOIC package. F K. Beckmeyer 10/13/05 Added “LF” packaging and ordering info to both “R” and”F” packages. 12/17/09 Added EOL note for non-gren parts. IDT / ICS BUFFER/CLOCK DRIVER ICSLV810 BUFFER/CLOCK DRIVER FAN OUT BUFFER Innovate with IDT and accelerate your future networks. Contact: For Sales 800-345-7015 408-284-8200 Fax 408-284-2775 For Tech Support Corporate Headquarters Integrated Device Technology, Inc. 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA

PDF Datasheet Preview

BUFFER/CLOCK DRIVER

DATASHEET

ICSLV810

The ICSLV810 is a low skew V to V, 1:10 fanout buffer. This device is specifically designed for data communications clock management. The large fanout from a single input line reduces loading on the input clock. The TTL level outputs reduce noise levels on the part. Typical applications are clock and signal distribution.
• Packaged in 20-pin QSOP/SSOP
• Split 1:10 fanout Buffer
• Maximum skew between outputs of different packages
• Max propagation delay of ns
• Operating voltage of V to V on Bank A
• Operating voltage of V to V on Banks B and C
• Advanced, low power, CMOS process
• Industrial temperature range -40° C to +85° C
• V tolerant input when VDDA=2.5 V
• Available in Pb lead free packaging

NOTE EOL for non-green parts to occur on 5/13/10 per PDN U-09-01

Block Diagram

CLKIN

VDDA

VDDB VDDC

CLK 1 CLK 2 CLK 3 CLK 4 CLK 5 CLK 6 CLK 7 CLK 8 CLK 9 CLK 10

IDT / ICS BUFFER/CLOCK DRIVER

ICSLV810 BUFFER/CLOCK DRIVER

Pin Assignment

CLKIN 1

GND 2

CLK 1 3

VDDA

CLK 2 5

GND 6 CLK 3 7

VDDA 8

CLK 4 9

GND 10
20 VDDB 19 CLK 10 18 CLK 9 17 GND 16 CLK 8 15 VDDC 14 CLK 7 13 GND 12 CLK 6 11 CLK 5
20 pin 150mil SSOP

Pin Descriptions

Pin Number
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Pin Name

CLKIN GND CLK1 VDDA CLK2 GND CLK3 VDDA CLK4 GND CLK5 CLK6 GND CLK7 VDDC CLK8 GND CLK9 CLK10 VDDB

Pin Type

Input Power Output Power Output Power Output Power Output Power Output Power Output Power Output Power Output Power

Pin Description

Clock input. Connect to ground. Clock output. Connect to - V. Clock output. Connect to ground. Clock output. Connect to - V. Clock output. Connect to ground. Clock output. Clock output. Connect to ground. Clock output. Connect to - V. Clock output. Connect to ground. Clock output. Clock output. Connect to - V.

FAN OUT BUFFER

IDT / ICS BUFFER/CLOCK DRIVER

ICSLV810 BUFFER/CLOCK DRIVER

FAN OUT BUFFER

External Components

The ICSLV810 requires a minimum number of external components for proper operation.
Ordering Information

E1 E A

Symbol A A1 A2 b c D E E1 e L α

Basic

Basic
*For reference only. Controlling dimensions in mm.

SEATING

PLANE L

Part / Order Number

LV810RI LV810RIT LV810FI LV810FIT LV810RILF LV810RILFT LV810FILF LV810FILFT

Marking

ICSLV810RI ICSLV810FI LV810RILF LV810FILF

Shipping Packaging

Tubes Tape and Reel

Tubes Tape and Reel

Tubes Tape and Reel

Tubes Tape and Reel

Package
20-pin QSOP 20-pin QSOP 20-pin SSOP 20-pin SSOP 20-pin QSOP 20-pin QSOP 20-pin SSOP 20-pin SSOP

Temperature
-40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C

NOTE EOL for non-green parts to occur on 5/13/10 per PDN U-09-01

Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems ICS assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.

IDT / ICS BUFFER/CLOCK DRIVER

ICSLV810 BUFFER/CLOCK DRIVER

FAN OUT BUFFER

P.Griffith 03/25/05 New device/datasheet.

P.Griffith 05/02/05 Released from Preliminary to final changed Short Circuit Current parameter in V DC

Char table to ±80 mA changed Short Circuit Current parameter in V DC Char table to
±35 mA

P.Griffith 05/12/05 Added bullet in “Features” for operating voltage of V on Bank A and specified that
operating voltages of and V are on Banks B and C changed block diagram input
and pin 1 from IN to CLKIN removed V spec from pin 4 and pin 8 descriptions added
“VDDA + V” to “All Inputs and Outputs” section of Absolute Maximum Ratings added
min and max values for Banks A, B, and C “Power Supply Voltage” in Recommended

Operating Conditions expanded DC Electrical Char tables in to include a separate table
for Banks A, B, and C expanded AC Electrical Char tables in to include a separate table
for Banks A, B, and C;
P.Griffith 06/21/05 Added 209 mil 20-pin SSOP package and ordering info.

E K. Beckmeyer 07/27/05 Specified operating voltage on Bank A from 1.5V to 2.5V Added figures 4 and 5 on page 10 to explain Pulse Skew and Part-to-Part Skew Changed Output Frequency Max Specification to 133MHz in AC Electrical Char tables for Banks A, B, and C Added Duty Cycle Spec for VDD = 1.5V in AC Electrical Char tables for Banks A, B, C Changed CLK conditions in DC Electrical Char tables on Banks B and C removed SOIC package.
F K. Beckmeyer 10/13/05 Added “LF” packaging and ordering info to both “R” and”F” packages.
12/17/09 Added EOL note for non-gren parts.

IDT / ICS BUFFER/CLOCK DRIVER

ICSLV810 BUFFER/CLOCK DRIVER

FAN OUT BUFFER

Innovate with IDT and accelerate your future networks. Contact:

For Sales
800-345-7015 408-284-8200 Fax 408-284-2775

For Tech Support

Corporate Headquarters

Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived LV810RI Datasheet file may be downloaded here without warranties.

Datasheet ID: LV810RI 637234