8705BYLF

8705BYLF Datasheet

ICS8705

Part	Datasheet
8705BYLF	8705BYLF (pdf)

Related Parts	Information
8705BYLFT	8705BYLFT

PDF Datasheet Preview
Integrated Circuit Systems, Inc. ICS8705 ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR The ICS8705 is a highly versatile 1:8 Differen- tial-to-LVCMOS/LVTTL Clock Generator and a HiPerClockS member of the HiPerClockS family of High Per- formance Clock Solutions from ICS.The ICS8705 has two selectable clock inputs. The CLK1, nCLK1 pair can accept most standard differential input lev- els. The single ended CLK0 input accepts LVCMOS or LVTTL input levels.The ICS8705 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider and has an input and output frequency range of 15.625MHz to 250MHz. The reference divider, feedback divider and output divider are each programmable, thereby allowing for the fol- lowing output-to-input frequency ratios 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, The external feedback allows the device to achieve “zero delay” between the input clock and the output clocks. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed around the PLL and into the internal output dividers. • 8 LVCMOS/LVTTL outputs, 7Ω typical output impedance • Selectable CLK1, nCLK1 or LVCMOS/LVTTL clock inputs • CLK1, nCLK1 pair can accept the following differential input levels LVPECL, LVDS, LVHSTL, HCSL, SSTL • CLK0 input accepts LVCMOS or LVTTL input levels • Output frequency range 15.625MHz to 250MHz • Input frequency range 15.625MHz to 250MHz • VCO range 250MHz to 500MHz • External feedback for “zero delay” clock regeneration with configurable frequencies • Programmable dividers allow for the following output-to-input frequency ratios 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8 • Fully integrated PLL • Cycle-to-cycle jitter 45ps maximum • Output skew CLK0, 65ps maximum CLK1, nCLK1, 55ps maximum • Static Phase Offset 25 ±125ps maximum , CLK0 • Full 3.3V or 2.5V operating supply • 0°C to 70°C ambient operating temperature • Lead-Free package fully RoHS compliant BLOCK DIAGRAM PLL_SEL CLK0 ÷2, ÷4, ÷8, ÷16, ÷32, ÷64, ÷128 CLK1 nCLK1 CLK_SEL FB_IN 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8 SEL0 SEL1 SEL2 SEL3 MR 8705BY PIN ASSIGNMENT Q6 GND Q7 VDDO SEL3 VDDA PLL_SEL TABLE ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS8705BY ICS8705BY 32 Lead LQFP tray 0°C to 70°C ICS8705BYT ICS8705BY 32 Lead LQFP 1000 tape & reel 0°C to 70°C ICS8705BYLF ICS8705BYLF 32 Lead "Lead Free" LQFP 250 per tray 0°C to 70°C ICS8705BYLFT ICS8705BYLF 32 Lead "Lead Free" LQFP 1000 0°C to 70°C NOTE Parts that are ordered with an “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant. The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated ICS assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8705BY Integrated Circuit Systems, Inc. ICS8705 ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR Table A T3A T4D:T4F T5B T3A T5A C T1, T4A, T4D T5A, T5B T5A & T5B T5A & T5B T5B G Description of Change 14 Ordering Information Table - added "Lead-Free" part number 1 Features Section - added temperature bullet. 16 Ordering Information Table - Added "Lead-Free" note. Date 1/25/02 3/14/02 4/4/02 4/10/02 7/15/02 8/1/02 8/21/02 11/22/02 1/22/03 2/13/03 3/14/03 5/15/03 6/6/03 6/16/04 3/18/05 8705BY

PDF Datasheet Preview

Integrated Circuit Systems, Inc.

ICS8705

ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR

The ICS8705 is a highly versatile 1:8 Differen-
tial-to-LVCMOS/LVTTL Clock Generator and a

HiPerClockS member of the HiPerClockS family of High Per-
formance Clock Solutions from ICS.The ICS8705
has two selectable clock inputs. The CLK1,
nCLK1 pair can accept most standard differential input lev-
els. The single ended CLK0 input accepts LVCMOS or LVTTL
input levels.The ICS8705 has a fully integrated PLL and can
be configured as zero delay buffer, multiplier or divider and
has an input and output frequency range of 15.625MHz to
250MHz. The reference divider, feedback divider and output
divider are each programmable, thereby allowing for the fol-
lowing output-to-input frequency ratios 8:1, 4:1, 2:1, 1:1, 1:2,
1:4, The external feedback allows the device to achieve
“zero delay” between the input clock and the output clocks.

The PLL_SEL pin can be used to bypass the PLL for system
test and debug purposes. In bypass mode, the reference clock
is routed around the PLL and into the internal output dividers.
• 8 LVCMOS/LVTTL outputs, 7Ω typical output impedance
• Selectable CLK1, nCLK1 or LVCMOS/LVTTL clock inputs
• CLK1, nCLK1 pair can accept the following differential
input levels LVPECL, LVDS, LVHSTL, HCSL, SSTL
• CLK0 input accepts LVCMOS or LVTTL input levels
• Output frequency range 15.625MHz to 250MHz
• Input frequency range 15.625MHz to 250MHz
• VCO range 250MHz to 500MHz
• External feedback for “zero delay” clock regeneration
with configurable frequencies
• Programmable dividers allow for the following output-to-input
frequency ratios 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8
• Fully integrated PLL
• Cycle-to-cycle jitter 45ps maximum
• Output skew CLK0, 65ps maximum

CLK1, nCLK1, 55ps maximum
• Static Phase Offset 25 ±125ps maximum , CLK0
• Full 3.3V or 2.5V operating supply
• 0°C to 70°C ambient operating temperature
• Lead-Free package fully RoHS compliant

BLOCK DIAGRAM

PLL_SEL CLK0
÷2, ÷4, ÷8, ÷16,
÷32, ÷64, ÷128

CLK1 nCLK1

CLK_SEL

FB_IN
8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8

SEL0 SEL1 SEL2 SEL3

MR 8705BY

PIN ASSIGNMENT

Q6 GND

Q7 VDDO SEL3 VDDA PLL_SEL
TABLE ORDERING INFORMATION

Part/Order Number

Marking

Package

Shipping Packaging Temperature

ICS8705BY

ICS8705BY
32 Lead LQFP
tray
0°C to 70°C

ICS8705BYT

ICS8705BY
32 Lead LQFP
1000 tape & reel
0°C to 70°C

ICS8705BYLF

ICS8705BYLF
32 Lead "Lead Free" LQFP
250 per tray
0°C to 70°C

ICS8705BYLFT

ICS8705BYLF
32 Lead "Lead Free" LQFP
1000
0°C to 70°C

NOTE Parts that are ordered with an “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant.

The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated ICS assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
8705BY

Integrated Circuit Systems, Inc.

ICS8705

ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR

Table

A T3A

T4D:T4F T5B T3A

T5A C

T1, T4A, T4D

T5A, T5B

T5A & T5B T5A & T5B

T5B G

Description of Change
14 Ordering Information Table - added "Lead-Free" part number
1 Features Section - added temperature bullet. 16 Ordering Information Table - Added "Lead-Free" note.

Date 1/25/02 3/14/02
4/4/02
4/10/02 7/15/02 8/1/02 8/21/02
11/22/02
1/22/03
2/13/03
3/14/03 5/15/03 6/6/03 6/16/04 3/18/05
8705BY

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Datasheet ID: 8705BYLF 637188