DAC1205D750HW/C1,5

DAC1205D750HW/C1,5 Datasheet

DAC1205D750

Part	Datasheet
DAC1205D750HW/C1,5	DAC1205D750HW/C1,5 (pdf)

Related Parts	Information
DAC1205D750HW/C1:5	DAC1205D750HW/C1:5

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DAC1205D750 Dual 12-bit DAC, up to 750 Msps 4x and 8x interpolating The DAC1205D750 is a high-speed 12-bit dual channel Digital-to-Analog Converter DAC with selectable or interpolating filters optimized for multi-carrier wireless transmitters. Thanks to its digital on-chip modulation, the DAC1205D750 allows the complex I and Q inputs to be converted from BaseBand BB to IF. The mixing frequency is adjusted via a Serial Peripheral Interface SPI with a 32-bit Numerically Controlled Oscillator NCO and the phase is controlled by a 16-bit register. Two modes of operation are available separate data ports or a single interleaved high-speed data port. In the Interleaved mode, the input data stream is demultiplexed into its original I and Q data and then latched. A and clock multiplier enables the DAC1205D750 to provide the appropriate internal clocks from the internal PLL. The internal PLL can be bypassed enabling the use of an external high frequency clock. The voltage regulator enables adjustment of the output full-scale current. Dual 12-bit resolution 750 Msps maximum update rate IMD3 74 dBc fs = Msps fo = 140 MHz ACPR 69 dBc 2-carrier WCDMA; fs = Msps fo = MHz Selectable or interpolation filters Typical W power dissipation at interpolation, PLL off and 740 Msps Input data rate up to 185 Msps Power-down and Sleep modes Very low noise cap-free integrated PLL Differential scalable output current from mA to 22 mA 32-bit programmable NCO frequency On-chip V reference Dual port or Interleaved data modes External analog offset control 10-bit auxiliary DACs V and V power supplies Internal digital offset control LVDS compatible clock Inverse x / sin x function Two’s complement or binary offset Fully compatible SPI port data format V/3.3 V CMOS input data buffers Industrial temperature range from C to +85 C Integrated Device Technology DAC1205D750 Dual 12-bit DAC, up to 750 Msps 4x and 8x interpolating Wireless infrastructure LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA Communication LMDS/MMDS, point-to-point Direct Digital Synthesis DDS Broadband wireless systems Digital radio links Instrumentation Automated Test Equipment ATE Ordering information Table Ordering information Type number Package Name DAC1205D750HW HTQFP100 plastic thermal enhanced thin quad flat package 100 leads body 14 1 mm exposed die pad Version SOT638-1 DAC1205D750 5 IDT All rights reserved. 2 of 41 x xx x xxx Block diagram Integrated Device Technology DAC1205D750 5 DAC1205D750 Dual 12-bit DAC, up to 750 Msps 4x and 8x interpolating SCS_N SDIO SCLK 62 63 65 64 SPI DAC1205D750 I0 to I11 18 to 25, 28 to 31 dual port/ interleaved data modes Q0 to Q11 41, 42, 45 to 48, 51 to 56 8 CLKP 9 CLKN LATCH I FIR1 2x FIR2 2x FIR3 2x LATCH Q FIR1 2x FIR2 2x FIR3 2x CLOCK GENERATOR/PLL Fig Block diagram 66 RESET_N SYNCP SYNCN Ordering information 2 Block diagram 3 Pinning information 4 Pinning 4 Pin description 5 Limiting values. 8 Thermal characteristics 8 Characteristics 9 Application information. 13 General description 13 Serial peripheral interface. 13 Protocol description 13 SPI timing description 14 Detailed descriptions of registers 15 Detailed register descriptions 17 Recommended configuration 22 Input data 22 Dual-port mode 22 Interleaved mode 22 Input clock 24 Timing 24 Timing when using the internal PLL on . 25 Timing when using an external PLL off 25 FIR filters 25 Quadrature modulator and Numerically Controlled Oscillator NCO 26 NCO in 32-bit 27 Low-power NCO 27 Minus_3dB function 27 x / sin x 27 DAC transfer function. 28 Full-scale current 28 Regulation 28 Full-scale current adjustment. 29 Digital offset adjustment. 30 Analog output. 31 Auxiliary DACs 32 Output configuration. 32 Basic output configuration 32 DC interface to an Analog Quadrature Modulator AQM 33 AC interface to an Analog Quadrature Modulator AQM 35 Power and grounding. 36 Package outline. 37 Abbreviations 38 Glossary. 39 Contact information 40 Contents. 41 DAC1205D750 5 IDT All rights reserved. 41 of 41

PDF Datasheet Preview

DAC1205D750

Dual 12-bit DAC, up to 750 Msps 4x and 8x interpolating

The DAC1205D750 is a high-speed 12-bit dual channel Digital-to-Analog Converter DAC with selectable or interpolating filters optimized for multi-carrier wireless transmitters.

Thanks to its digital on-chip modulation, the DAC1205D750 allows the complex I and Q inputs to be converted from BaseBand BB to IF. The mixing frequency is adjusted via a Serial Peripheral Interface SPI with a 32-bit Numerically Controlled Oscillator NCO and the phase is controlled by a 16-bit register.

Two modes of operation are available separate data ports or a single interleaved high-speed data port. In the Interleaved mode, the input data stream is demultiplexed into its original I and Q data and then latched.

A and clock multiplier enables the DAC1205D750 to provide the appropriate internal clocks from the internal PLL. The internal PLL can be bypassed enabling the use of an external high frequency clock. The voltage regulator enables adjustment of the output full-scale current.

Dual 12-bit resolution 750 Msps maximum update rate

IMD3 74 dBc fs = Msps fo = 140 MHz

ACPR 69 dBc 2-carrier WCDMA;
fs = Msps fo = MHz Selectable or interpolation filters Typical W power dissipation at
interpolation, PLL off and 740 Msps

Input data rate up to 185 Msps

Power-down and Sleep modes

Very low noise cap-free integrated PLL Differential scalable output current from
mA to 22 mA
32-bit programmable NCO frequency On-chip V reference

Dual port or Interleaved data modes External analog offset control
10-bit auxiliary DACs

V and V power supplies

Internal digital offset control

LVDS compatible clock

Inverse x / sin x function

Two’s complement or binary offset Fully compatible SPI port
data format

V/3.3 V CMOS input data buffers Industrial temperature range from
C to +85 C

Integrated Device Technology

DAC1205D750

Dual 12-bit DAC, up to 750 Msps 4x and 8x interpolating

Wireless infrastructure LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA Communication LMDS/MMDS, point-to-point Direct Digital Synthesis DDS Broadband wireless systems Digital radio links Instrumentation Automated Test Equipment ATE
Ordering information
Table Ordering information

Type number

Package

Name

DAC1205D750HW

HTQFP100
plastic thermal enhanced thin quad flat package 100 leads body 14 1 mm exposed die pad

Version SOT638-1

DAC1205D750 5

IDT All rights reserved.
2 of 41
x xx x xxx

Block diagram

Integrated Device Technology

DAC1205D750 5

DAC1205D750

Dual 12-bit DAC, up to 750 Msps 4x and 8x interpolating

SCS_N

SDIO

SCLK
62 63 65 64 SPI

DAC1205D750

I0 to I11
18 to 25, 28 to 31
dual port/ interleaved data modes

Q0 to Q11
41, 42, 45 to 48, 51 to 56
8 CLKP
9 CLKN

LATCH I

FIR1 2x

FIR2 2x

FIR3 2x

LATCH Q

FIR1 2x

FIR2 2x

FIR3 2x

CLOCK GENERATOR/PLL

Fig Block diagram
66 RESET_N

SYNCP SYNCN
Ordering information 2

Block diagram 3

Pinning information 4 Pinning 4 Pin description 5

Limiting values. 8

Thermal characteristics 8

Characteristics 9

Application information. 13 General description 13 Serial peripheral interface. 13 Protocol description 13 SPI timing description 14 Detailed descriptions of registers 15 Detailed register descriptions 17 Recommended configuration 22 Input data 22 Dual-port mode 22 Interleaved mode 22 Input clock 24 Timing 24 Timing when using the internal PLL on . 25 Timing when using an external PLL off 25 FIR filters 25

Quadrature modulator and Numerically Controlled Oscillator NCO 26 NCO in 32-bit 27 Low-power NCO 27 Minus_3dB function 27 x / sin x 27 DAC transfer function. 28 Full-scale current 28 Regulation 28 Full-scale current adjustment. 29 Digital offset adjustment. 30 Analog output. 31 Auxiliary DACs 32 Output configuration. 32 Basic output configuration 32 DC interface to an Analog Quadrature Modulator AQM 33 AC interface to an Analog Quadrature Modulator AQM 35 Power and grounding. 36

Package outline. 37

Abbreviations 38

Glossary. 39

Contact information 40

Contents. 41

DAC1205D750 5

IDT All rights reserved.
41 of 41

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Datasheet ID: DAC1205D750HW/C1,5 636938