Security & Chip Card ICs SLE 66CX642P
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SLE 66CX642P M5.2 (pdf) |
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SLE 66CX642P MFC5.8 |
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Security & Chip Card ICs SLE 66CX642P 16-Bit Security Controller with Memory Management and Protection Unit in µm CMOS Technology 208-Kbytes ROM, 5052 bytes RAM, 64-Kbytes EEPROM 1100-Bit Advanced Crypto Engine and 112-Bit / 192-Bit DDES-EC2 Accelerator Short Product Information SLE 66CX642P Short Product Information Ref. SPI_SLE 66CX642P_1102.doc This document contains preliminary information on a new product under development. Details are subject to change without notice. Previous Releases: Important: Further information is confidential and on request. Please contact Infineon Technologies AG in Munich, Germany, Security & Chip Card ICs, Tel +49 - 0 89 234-80000 Fax +49 - 0 89 234-81000 E-Mail: Edition 2002 Published by Infineon Technologies AG, CC Applications Group St.-Martin-Strasse 53, D-81541 München Infineon Technologies AG 2001 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives world-wide see address list . Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. SLE 66CX642P 16-Bit Security Controller with MMU in 0.22µm CMOS Technology 208-Kbytes ROM, 5052 bytes RAM, 64-Kbytes EEPROM 1100-Bit ACE and 112-Bit / 112-Bit / 192-Bit DDES-EC2 Accelerator • 16-bit microcomputer in µm CMOS technology • Instruction set opcode compatible with standard SAB 8051 processor • Enhanced 16-bit arithmetic • Additional powerful instructions optimized for chip card applications • Dedicated, non-standard architecture with execution time 6 times faster 18 times by PLLmax than standard SAB 8051 processor at same external clock • 206 Kbytes User ROM for application programs • Additional 2 Kbytes reserved ROM for Resource Management System RMS+ Superslim with intelligent EEPROM write/erase routines • 64 Kbytes Superslim-EEPROM • 4 Kbytes XRAM, 256 + 700 Bytes IRAM • Memory Management and Protection Unit MMU • Dual Key Triple DES DDES and EC2 GF 2n Accelerator • Advanced Crypto Engine for up to 2048 bit RSA computation • Certified RSA 2048 library available refer to product brief • CRC Module • Interrupt Module • Two 16-bit Autoreload Timer • PLL up to 15 MHz • Power saving sleep mode • Ext. Clock freq. 1 to MHz for int. Clock 15 MHz 2.7V-5.5V Ext. Clock freq. 1 to 5 MHz for int. Clock 11 MHz 1.62V-5.5V • UART for handling serial interface in accordance with ISO/IEC 7816 part 3 supporting transmission protocols T=1 and T=0 Ordering Information Type SLE 66CX642P M5 SLE 66CX642P C SLE 66CX642P Package1 Voltage Range Temperature Range Frequency Range ext. clock frequency V - V 25°C to + 70°C 1 MHz - 5 MHz V 25°C to + 85°C 1 MHz - MHz For ordering information please refer to the databook and contact your sales representative. Production sites: • Dresden Germany SLE 66CxxxP • UMC Taiwan SLE 66CxxxPU • Altis France SLE 66CxxxPA 1 available as wire-bonded module M5 for embedding in plastic cards or as die C for customer packaging Short Product Information 6 / 11 Pin Configuration VCC GND SLE 66CX642P Figure 1 Pin Configuration Pin Definitions and Functions Symbol VCC RST CLK GND I/O Function Operating voltage Reset input Processor clock input Ground Bi-directional data port SLE 66CX642P Short Product Information 7 / 11 SLE 66CX642P SLE 66CX642P is a member of Infineon Technologies high end security controller family in advanced µm CMOS technology. The CPU provides the high efficiency of the SAB 8051 instruction set extended by additional powerful instructions together with enhanced performance, memory sizes and security features. The internal clock frequency can be adjusted up to 15 MHz independent of the clock rate of the terminal with the help of the PLL. The controller IC offers 206 Kbytes of User-ROM, 256 byte internal RAM, 4096 byte XRAM and 64 Kbytes Superslim-EEPROM. The Memory Management and Protection Unit allows a secure separation of the operating system and the applications. Furthermore the MMU makes a secure downloading of applications possible after the personalization of a card. These new features suit the requirements of the next generation of multi application operating systems. For code compatibility to the SLE 66CxxS family, a transparent mode for the MMU is established which allows to keep the memory mapping of the SLE 66CxxS products. Voltage Clock Reset RROOMM XRAM EEPROM DES-EC2 Advanced 220008KKbbyyttee 4 Kbyte 64 Kbyte Accelerator Crypto Engine 16-Bit CPU with MMU & ECO 2000 Instruction Set Sleep Mode Logic Sensors/Filters Voltage Regulator Interrupt Address-/Data Bus two 16-bit Timer Random Number Generator UART Figure 2 Block Diagram SLE 66CX642P The CRC module allows the easy generation of checksums according to ISO/IEC 3309 16-BitCRC . To minimize the overall power consumption, the chip card controller IC offers a sleep mode. The UART supports the half-duplex transmission protocols T=0 and T=1 according to ISO/IEC All relevant transmission parameters can be adjusted by software, as e.g. the clock division factor, direct/inverse convention and the number of stop bits. Additionally, the I/O port can be driven by communication routines realized in software. The Advanced Crypto Engine is equipped with its own RAM of 700 bytes and supports all of today known public-key algorithms based on large integer modular arithmetic. It allows fast and efficient calculation of e.g. RSA operations with key lengths up to 2048 bit. The DDES-EC2 accelerator consists of two modules. The DES module supports symmetrical crypto algorithms according to the Data Encryption Standard in the Electronic Code Book Mode. The EC2 module accelerates the multiplication in GF 2n and therefore the operations for elliptic curve cryptography. The random number generator RNG is able to supply the CPU with true random numbers on all conditions. As an important feature, the chip provides a new and enhanced level of on-chip security, which fulfills the strong security requirements of a Common Criteria evaluation at an EAL5 level. Short Product Information 8 / 11 |
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