PSB 21653 EL V1.5-G
PSB 21653 EL V1.5-G Datasheet
Single-chip IP Phone with Internal GbESwitch PSB 21653E
| Part | Datasheet |
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PSB 21653 EL V1.5-G |
PSB 21653 EL V1.5-G (pdf) |
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| Single-chip IP Phone with Internal GbESwitch PSB 21653E is Infineon‘s second generation of IP Phone terminal chips, and the 5th generation of PBX phone devices. Enabled by two powerful 400 MHz MIPS CPU’s and an internal Gigabit Ethernet switch it represents a quantum leap for IP Phones in the Telecommunication network. Typically an IP Phone is not the end point of the IP network‘s architecture and as such should not represent a bottleneck for a Gigabit Ethernet Network. INCA-IP2’s dual core approach offers a tremendous opportunity to IP Phone manufacturers to differentiate their phones in an increasingly competitive environment. The INCA-IP2‘s powerful engine turns the IP Phone into an IP appliance enabling a slew of voice and multimedia features, making it possible to offer low to high end phones based on one platform. Phone makers can consider adding AMR, LEC, AEC, T.38, MP3 decoding, MiDi Synthesizer and even streaming video to their feature sets. CPU Features • 400 MHz MIPS 24KEc CPU • 16kB Instruction and 16kB Data Cache • DDR-SDRAM Controller, NAND and NOR Flash support • Support for 16 bit instruction encoding MIPS16e ASE for code size reduction Voice Processing Features • 400 MHz MIPS 24KEc voice engine with DSP application specific extensions • Voice Coding G.711,G.723.1, G.729A/B, G.722, G.722.1, iLBC, AMR, • Two D/A and A/D converters for in call announcements and other applications • Advanced acoustic echo cancellation for full duplex speakerphone, three-party conferencing with mixed codecs Handset echo cancellation Voice Activity Detection Speech Recognition Ethernet Features • Full 3 port Gigabit Ethernet Switch with two GMACs and RGMII interface for optional connection of external GPHYs • Two integrated 10/100BaseT Ethernet MACs and PHYs for LAN and PC connection • 802.1p & Q standard compliant • Sophisticated Policy and Flow Engine supporting up to 24 flows, based on L2 to L7 information, allowing leading edge traffic classification • Flexible Traffic Management • Support for up to 4 priority queues, enabling time-sensitive data to have access to the network with minimal delay Interfaces and Ports • USB2.0 Full/Low Speed Host • Two SSC synchronous serial interface , SPI compatible, • EBU parallel 8/16 Bit Interface • PCM interface including FIFO, AC97 codec interface • Memory controller supporting SDR and DDR1 SDRAM • Two ASC/UART supporting IrDA • Under voltage detection UVD with power on reset functionality saves external POR • Real time clock RTC , optionally with separate oscillator connection for low power mode Data Encryption Unit • Powerful HW-accelerator to support encryption • DES/3DES, AES and hashing SHA-1, MD5 • True Random Number generator • 802.1x Authentication Applications • IP Phones and Video Phones • WLAN base-stations • Network Fax Machines w. i n f i n e o n c o m / v o ip Communication Solutions INCA - IP2 Block Diagram Headset Handset Micro Speaker DDR/SDR SDRAM Memory Controller D-Cache I-Cache D-Cache I-Cache MIPS 24KEc CPU IP-Phone INCA-IP2 RGMII RGMII GPHY optional Ethernet 10/100 3 Port Gigabit Ethernet Switch Pseudo MAC MIPS 24KEc CPU RGMII GPTU RTC TRNG AES, DES/3DES SHA-1, MD5 KEY Scan LED PWM1 SSC0 SSC1 ASC0 ASC1 PCM Mux PWM2 USB Host Ordering No. B116-H8616-G1-X-7600 |
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