ISP 75N
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ISP75N (pdf) |
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Smart Lowside Power Switch For Industrial Applications ISP 75N Data Sheet V • Lead free • Logic Level Input • Input protection ESD • Thermal shutdown with auto restart • Overload protection • Short circuit protection • Overvoltage protection • Current limitation Application • All kinds of resistive, inductive and capacitive loads in industrial applications • µC compatible power switch for 12 V and 24 V DC applications and for 42 Volt Powernet • Replaces electromechanical relays and discrete circuits N channel vertical power FET in Smart Power Technology, protected by embedded protection functions. Type ISP 75N Ordering Code on request Package PG-SOT223-4 Product Summary Parameter Continuous drain source voltage On-state resistance Current limitation Nominal load current Clamping energy VDS RDS ON ID lim ID Nom EAS Value 60 550 1 550 Unit V A mJ Data Sheet V 2008-04-14 ISP 75N ISP75N Logic Over voltage Protection OUTPUT Stage DRAIN dV/dt limitation Over temperature Protection Short circuit Protection Current Limitation SOURCE Figure 1 Block Diagram SOURCE TAB 1 IN 2 DRAIN 3 SOURCE Figure 2 Pin Configuration Pin Definitions and Functions Pin No. Symbol Function Input activates output and supplies internal logic DRAIN Output to the load 3 + TAB SOURCE Ground pin3 and TAB are internally connected Data Sheet V 2008-04-14 ISP 75N Circuit Description The ISP 75N is a monolithic power switch in Smart Power Technology SPT with a logic level input, an open drain DMOS output stage and integrated protection functions. It is designed for all kind of resistive and inductive loads relays, solenoid in industrial applications. Protection Functions Note The device provides embedded protection functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operation. • Over voltage protection An internal clamp limits the output voltage at VDS AZ min. 60V when inductive loads are switched off. • Current limitation By means of an internal current measurement the drain current is limited at ID lim - A typ. . If the current limitation is active the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. This operation leads to an increasing junction temperature until the over temperature threshold is reached. • Over temperature and short circuit protection This protection is based on sensing the chip temperature. The location of the sensor ensures a fast and accurate junction temperature detection. Over temperature shutdown occurs at minimum 150 °C. A hysteresis of typ. 10 K enables an automatic restart by cooling. The device is ESD protected according Human Body Model 4 kV and load dump protected see Maximum Ratings . Data Sheet V 2008-04-14 ISP 75N |
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