S5U13706P00C000

S5U13706P00C000 Datasheet

• S5U13706 Evaluation Boards<br>• CE Display Driver

Part	Datasheet
S5U13706P00C000	S5U13706P00C000 (pdf)

Related Parts	Information
S1D13706F00A200	S1D13706F00A200

PDF Datasheet Preview
GRAPHICS S1D13706 Embedded Memory LCD Controller S1D13706 March 2009 The S1D13706 is a color/monochrome LCD graphics controller with an embedded 80K byte SRAM display buffer. While supporting all other panel types, the S1D13706 is the only LCD controller to directly interface to both the Epson D-TFD and the Sharp HR-TFT family of products thus removing the requirement of an external Timing Control IC. This high level of integration provides a low cost, low power, single chip solution to meet the demands of embedded markets such as Mobile Communications devices and Palm-size PCs, where board size and battery life are major concerns. The S1D13706 utilizes a guaranteed low-latency CPU architecture thus providing support for microprocessors without READY/WAIT# handshaking signals. The 32-bit internal data path provides high performance bandwidth into display memory allowing for fast screen updates. Products requiring a rotated display image can take advantage of the SwivelViewTM feature which provides hardware rotation of the display memory transparent to the software application. The S1D13706 also provides support for “Picture-in-Picture Plus” a variable size Overlay window . The S1D13706 provides impressive support for Palm handhelds, however its impartiality to CPU type or operating system makes it an ideal display solution for a wide variety of applications. • FEATURES • Embedded Display Buffer. • Low Operating Voltage. • Low-latency CPU interface. • Direct support for the multiple CPU types. • Programmable Resolutions and Color depths. • STN LCD support. • Active Matrix LCD support. • Reflective Active Matrix support. • SwivelViewTM 90, 180, 270° hardware rotation of displayed image . • “Picture-in-Picture Plus”. • Software Initiated Power Save Mode. • Hardware or Software Video Invert. • 100-pin TQFP15 package. • 104-pin CFLGA package. • SYSTEM BLOCK DIAGRAM CPU X31B-C-001-03 Data and Control Signals S1D13706 Digital Out Flat Panel GRAPHICS S1D13706 • DESCRIPTION Memory Interface • Embedded 80K byte SRAM display buffer. CPU Interface • ‘Fixed’ low-latency CPU access times. • Direct support for Hitachi SH-4 / SH-3. Motorola M68xxx REDCAP2, DragonBall, ColdFire . MPU bus interface with programmable READY. Display Support • 4/8-bit monochrome LCD interface. • 4/8/16-bit color STN LCD interface. • Single-panel, single-drive passive displays. • 9/12/18-bit Active matrix TFT interface. • ‘Direct’ support for Epson D-TFD and Sharp HR-TFT external timing control IC not required . • Typical resolutions supported - - 160x160 - 160x240 Clock Source • Two clock inputs single clock possible . • Clock source can be internally divided down for a higher frequency clock input. Display Modes • 1/2/4/8/16 bit-per-pixel bpp support. • Up to 64 gray shades using FRM and dithering on monochrome passive LCD panels. • Up to 64K colors on passive STN panels. • Up to 64K colors on active matrix panels. • SwivelView direct hardware rotation of display image by 90°, 180°, • “Picture-in-Picture Plus” displays a variable size window overlaid over background image. • Double Buffering/multi-pages provides smooth animation and instantaneous screen update. Power Down Modes • Software Initiated Power Save Mode. Operating Voltage • COREVDD to volts and to volts. • HIOVDD to volts and to volts. • NIOVDD to volts. Package • 100-pin TQFP15. • 104-pin CFLGA. CONTACT YOUR SALES REPRESENTATIVE FOR THESE COMPREHENSIVE DESIGN TOOLS • S1D13706 Technical • Palm Hardware Manual

PDF Datasheet Preview

GRAPHICS

S1D13706 Embedded Memory LCD Controller

S1D13706

March 2009

The S1D13706 is a color/monochrome LCD graphics controller with an embedded 80K byte SRAM display buffer. While supporting all other panel types, the S1D13706 is the only LCD controller to directly interface to both the Epson D-TFD and the Sharp HR-TFT family of products thus removing the requirement of an external Timing Control IC. This high level of integration provides a low cost, low power, single chip solution to meet the demands of embedded markets such as Mobile Communications devices and Palm-size PCs, where board size and battery life are major concerns.

The S1D13706 utilizes a guaranteed low-latency CPU architecture thus providing support for microprocessors without READY/WAIT# handshaking signals. The 32-bit internal data path provides high performance bandwidth into display memory allowing for fast screen updates.

Products requiring a rotated display image can take advantage of the SwivelViewTM feature which provides hardware rotation of the display memory transparent to the software application. The S1D13706 also provides support for “Picture-in-Picture Plus” a variable size Overlay window .

The S1D13706 provides impressive support for Palm handhelds, however its impartiality to CPU type or operating system makes it an ideal display solution for a wide variety of applications.
• FEATURES
• Embedded Display Buffer.
• Low Operating Voltage.
• Low-latency CPU interface.
• Direct support for the multiple CPU types.
• Programmable Resolutions and Color depths.
• STN LCD support.
• Active Matrix LCD support.
• Reflective Active Matrix support.
• SwivelViewTM 90, 180, 270° hardware
rotation of displayed image .
• “Picture-in-Picture Plus”.
• Software Initiated Power Save Mode.
• Hardware or Software Video Invert.
• 100-pin TQFP15 package.
• 104-pin CFLGA package.
• SYSTEM BLOCK DIAGRAM

CPU X31B-C-001-03

Data and Control Signals

S1D13706

Digital Out

Flat Panel

GRAPHICS S1D13706
• DESCRIPTION

Memory Interface
• Embedded 80K byte SRAM display buffer.

CPU Interface
• ‘Fixed’ low-latency CPU access times.
• Direct support for Hitachi SH-4 / SH-3. Motorola M68xxx REDCAP2, DragonBall, ColdFire . MPU bus interface with programmable READY.

Display Support
• 4/8-bit monochrome LCD interface.
• 4/8/16-bit color STN LCD interface.
• Single-panel, single-drive passive displays.
• 9/12/18-bit Active matrix TFT interface.
• ‘Direct’ support for Epson D-TFD and Sharp HR-TFT external timing control IC not required .
• Typical resolutions supported - - 160x160 - 160x240

Clock Source
• Two clock inputs single clock possible .
• Clock source can be internally divided down for a higher frequency clock input.

Display Modes
• 1/2/4/8/16 bit-per-pixel bpp support.
• Up to 64 gray shades using FRM and dithering on monochrome passive LCD panels.
• Up to 64K colors on passive STN panels.
• Up to 64K colors on active matrix panels.
• SwivelView direct hardware rotation of display image by 90°, 180°,
• “Picture-in-Picture Plus” displays a variable size window overlaid over background image.
• Double Buffering/multi-pages provides smooth animation and instantaneous screen update.

Power Down Modes
• Software Initiated Power Save Mode.

Operating Voltage
• COREVDD to volts and to volts.
• HIOVDD to volts and to volts.
• NIOVDD to volts.

Package
• 100-pin TQFP15.
• 104-pin CFLGA.

CONTACT YOUR SALES REPRESENTATIVE FOR THESE COMPREHENSIVE DESIGN TOOLS
• S1D13706 Technical
• Palm Hardware

Manual

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived S5U13706P00C000 Datasheet file may be downloaded here without warranties.

Datasheet ID: S5U13706P00C000 511869