EPC9001C

EPC9001C Datasheet

Development Board EPC9001C Quick Start Guide

Part	Datasheet
EPC9001C	EPC9001C (pdf)

PDF Datasheet Preview
Development Board EPC9001C Quick Start Guide 40 V Half-Bridge with Gate Drive, Using EPC2015C QUICK START GUIDE The EPC9001C development board is a 40 V maximum device voltage, 15 A maximum output current, half bridge with onboard gate drives, featuring the EPC2015C enhancement mode field effect transistor FET . The purpose of this development board is to simplify the evaluation process of the EPC2015C eGaN FET by including all the critical components on a single board that can be easily connected into any existing converter. The EPC9001C development board is 2” x and contains two EPC2015Cs eGaN FET in a half bridge configuration using EPC9001C Texas Instruments LM5113 gate driver, supply and bypass capacitors. The board contains all critical components and layout for optimal switching performance. There are also various probe points to facilitate simple waveform measurement and efficiency calculation. A complete block diagram of the circuit is given in Figure For more information on the EPC2015Cs eGaN FET please refer to the datasheet available from EPC at The datasheet should be read in conjunction with this quick start guide. Table 1 Performance Summary TA = 25°C SYMBOL PARAMETER CONDITIONS VDD Gate Drive Input Supply Range VIN Bus Input Voltage Range VOUT Switch Node Output Voltage IOUT Switch Node Output Current VPWM PWM Logic Input Voltage Threshold Input ‘High’ Input ‘Low’ Minimum ‘High’ State Input Pulse Width VPWM rise and fall time < 10ns Minimum ‘Low’ State Input Pulse Width VPWM rise and fall time < 10ns 200# * Assumes inductive load, maximum current depends on die temperature actual maximum current with be subject to switching frequency, bus voltage and thermals. # Limited by time needed to ‘refresh’ high side bootstrap supply voltage. UNITS V A V ns Quick Start Procedure Development board EPC9001C is easy to set up to evaluate the performance of the EPC2015C eGaN FET. Refer to Figure for proper connect and measurement setup and follow the procedure below: With power off, connect the input power supply bus to +VIN J5, J6 and ground / return to J7, J8 . With power off, connect the switch node of the half bridge OUT J3, J4 to your circuit as required. With power off, connect the gate drive supply to +VDD J1, Pin-1 and ground return to J1, Pin-2 . With power off, connect the input PWM control signal to PWM J2, Pin-1 and ground return to any of the remaining J2 pins. Turn on the gate drive supply make sure the supply is between 7 V and 12 V range. Turn on the bus voltage to the required value do not exceed the absolute maximum voltage of 100 V on VOUT . Turn on the controller / PWM input source and probe switching node to see switching operation. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior, NOTE. When measuring the high frequency content switch node OUT , care must be taken to avoid long ground leads. Measure the switch node OUT by placing the oscilloscope probe tip through the large via on the switch node designed for this purpose and grounding the probe directly across the GND terminals provided. See Figure 3 for proper scope probe technique. THERMAL CONSIDERATIONS The EPC9001C development board showcases the EPC2015C eGaN FET. Although the electrical performance surpasses that for traditional silicon devices, their relatively smaller size does magnify the thermal management requirements. The EPC9001C is intended for bench evaluation with low ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of these devices, but care must be taken to not exceed the absolute maximum die temperature of 150°C. NOTE. The EPC2015C development board does not have any current or thermal protection on board. EPC EFFICIENT POWER CONVERSION CORPORATION \| \| COPYRIGHT 2015 \| \| PAGE 2 QUICK START GUIDE Gate Drive Gate Drive Supply Half-Bridge with Bypass Regulator Input Logic and LM5113 Dead-time Gate Adjust Driver

PDF Datasheet Preview

Development Board EPC9001C Quick Start Guide
40 V Half-Bridge with Gate Drive, Using EPC2015C

QUICK START GUIDE

The EPC9001C development board is a 40 V maximum device voltage, 15 A maximum output current, half bridge with onboard gate drives, featuring the EPC2015C enhancement mode field effect transistor FET . The purpose of this development board is to simplify the evaluation process of the EPC2015C eGaN FET by including all the critical components on a single board that can be easily connected into any existing converter.

The EPC9001C development board is 2” x and contains two EPC2015Cs eGaN FET in a half bridge configuration using

EPC9001C

Texas Instruments LM5113 gate driver, supply and bypass capacitors. The board contains all critical components and layout for optimal switching performance. There are also various probe points to facilitate simple waveform measurement and efficiency calculation. A complete block diagram of the circuit is given in Figure

For more information on the EPC2015Cs eGaN FET please refer to the datasheet available from EPC at The datasheet should be read in conjunction with this quick start guide.

Table 1 Performance Summary TA = 25°C

SYMBOL PARAMETER

CONDITIONS

VDD Gate Drive Input Supply Range VIN Bus Input Voltage Range VOUT Switch Node Output Voltage IOUT Switch Node Output Current

VPWM PWM Logic Input Voltage Threshold

Input ‘High’ Input ‘Low’

Minimum ‘High’ State Input Pulse Width

VPWM rise and fall time < 10ns

Minimum ‘Low’ State Input Pulse Width

VPWM rise and fall time < 10ns
200#
* Assumes inductive load, maximum current depends on die temperature actual maximum current with be subject to switching frequency, bus voltage and thermals. # Limited by time needed to ‘refresh’ high side bootstrap supply voltage.

UNITS V A V ns

Quick Start Procedure

Development board EPC9001C is easy to set up to evaluate the performance of the EPC2015C eGaN FET. Refer to Figure for proper connect and measurement setup and follow the procedure below:

With power off, connect the input power supply bus to +VIN J5, J6 and ground / return to J7, J8 . With power off, connect the switch node of the half bridge OUT J3, J4 to your circuit as required. With power off, connect the gate drive supply to +VDD J1, Pin-1 and ground return to J1, Pin-2 . With power off, connect the input PWM control signal to PWM J2, Pin-1 and ground return to any of the remaining J2 pins. Turn on the gate drive supply make sure the supply is between 7 V and 12 V range. Turn on the bus voltage to the required value do not exceed the absolute maximum voltage of 100 V on VOUT . Turn on the controller / PWM input source and probe switching node to see switching operation. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,

NOTE. When measuring the high frequency content switch node OUT , care must be taken to avoid long ground leads. Measure the switch node OUT by placing the oscilloscope probe tip through the large via on the switch node designed for this purpose and grounding the probe directly across the GND terminals provided. See Figure 3 for proper scope probe technique.

THERMAL CONSIDERATIONS

The EPC9001C development board showcases the EPC2015C eGaN FET. Although the electrical performance surpasses that for traditional silicon devices, their relatively smaller size does magnify the thermal management requirements. The EPC9001C is intended for bench evaluation with low ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of these devices, but care must be taken to not exceed the absolute maximum die temperature of 150°C.

NOTE. The EPC2015C development board does not have any current or thermal protection on board.

EPC EFFICIENT POWER CONVERSION CORPORATION | | COPYRIGHT 2015 |
| PAGE 2

QUICK START GUIDE

Gate Drive

Gate Drive Supply Half-Bridge with Bypass

Regulator

Input

Logic and

LM5113

Dead-time

Gate

Adjust

Driver

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived EPC9001C Datasheet file may be downloaded here without warranties.

Datasheet ID: EPC9001C 510921