PI4ULS3V08ZFE

PI4ULS3V08ZFE Datasheet

PI4ULS3V08

Part	Datasheet
PI4ULS3V08ZFE	PI4ULS3V08ZFE (pdf)

Related Parts	Information
PI4ULS3V08ZFEX	PI4ULS3V08ZFEX

PDF Datasheet Preview
PI4ULS3V08 1.2V to 3.6V Universal Bidirectional Level Shifter with Automatic Direction Control  PI4ULS3V08 is designed for low voltage PI4ULS3V08, is a 8-bit dual-octal non-inverting operation 1.2V to 3.6V  Universal bidirectional level shifting with automatic direction control  Fast bus speeds up to 180 Mbps for push-pull application bus transceiver with two separate supply rails A port VCCA and B port VCCB are set to operate at 1.2V to 3.6V. This arrangement permits universal bidirectional translation of differential signal levels over the voltage  Drive Capability 12mA ranges.  Independent translation of each bit  Each supply rail is configurable over supply range  ESD Protection exceeds JESD22 • 2000V Human Body Model A114-B • 200V Machine Model A115-A The PI4ULS3V08 is designed for asynchronous communication between data buses. Data is transmitted from the A bus to the B bus, or vice versa, without direction control. All AX, and BX are tri-stated when  Latch-up performance exceeds 100mA per JESD data is coming from both directions at the same time. 78  Industrial operation at -40°C to +85°C  Package 36-contact TQFN 5x6 The output-enable OE input is used to disable outputs so buses are isolated. The control pins xOE, xSEL, TEST_EN and OUT_SEL are supplied by VCCB. Pin Configuration To ensure the high impedance state during powerup or power- down, the output-enable OE input should be tied to VCC through a pull-up resistor the minimum value of the resistor is determined by the current-sinking capability of the driver.  Voltage Translation  Bus Relay  Mobile Devices Pin Description Pin Name TQFN-36L Top View xSEL xAx xBx TEST_EN OUT_SEL GND VCCA,VCCB TSTx 3-State Output Enable Inputs Active Low Outputs Loading Selection Side A Inputs/Outputs Side B Inputs/Outputs Enable Test Mode Output impedance select Ground Power Internal test pins. For normal usage, please tie to ground 2013-07-0006 PT0487 07/12/13 1 PI4ULS3V08 1.2V to 3.6V Universal Bidirectional Level Shifter with Automatic Direction Control Block Diagram Truth Table Inputs 1 xOE 2SEL 1SEL Outputs Loading 2 Ordering Information PI4ULS3V08ZFE Note E = Pb-free Adding X Suffix= Tape/Reel Package Code ZF Package Lead free and Green 36-pin TQFN 5x6 Pericom Semiconductor Corporation  1-800-435-2336  Pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom product. The company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom. 2013-07-0006 PT0487 07/12/13 7

PDF Datasheet Preview

PI4ULS3V08
1.2V to 3.6V Universal Bidirectional Level Shifter
with Automatic Direction Control
 PI4ULS3V08 is designed for low voltage

PI4ULS3V08, is a 8-bit dual-octal non-inverting
operation 1.2V to 3.6V  Universal bidirectional level shifting with
automatic direction control  Fast bus speeds up to 180 Mbps for push-pull
application
bus transceiver with two separate supply rails A port VCCA and B port VCCB are set to operate at 1.2V to 3.6V. This arrangement permits universal bidirectional translation of differential signal levels over the voltage
 Drive Capability 12mA
ranges.
 Independent translation of each bit  Each supply rail is configurable over supply range  ESD Protection exceeds JESD22
• 2000V Human Body Model A114-B
• 200V Machine Model A115-A

The PI4ULS3V08 is designed for asynchronous communication between data buses. Data is transmitted from the A bus to the B bus, or vice versa, without direction control. All AX, and BX are tri-stated when
 Latch-up performance exceeds 100mA per JESD data is coming from both directions at the same time.
78  Industrial operation at -40°C to +85°C  Package 36-contact TQFN 5x6

The output-enable OE input is used to disable outputs so buses are isolated.

The control pins xOE, xSEL, TEST_EN and

OUT_SEL are supplied by VCCB.

Pin Configuration

To ensure the high impedance state during powerup or power- down, the output-enable OE input should
be tied to VCC through a pull-up resistor the minimum
value of the resistor is determined by the current-sinking
capability of the driver.
 Voltage Translation  Bus Relay  Mobile Devices

Pin Description

Pin Name

TQFN-36L Top View
xSEL
xAx xBx TEST_EN OUT_SEL GND VCCA,VCCB

TSTx
3-State Output Enable Inputs Active Low

Outputs Loading Selection

Side A Inputs/Outputs Side B Inputs/Outputs Enable Test Mode Output impedance select Ground Power Internal test pins. For normal usage, please tie to ground
2013-07-0006

PT0487 07/12/13 1

PI4ULS3V08 1.2V to 3.6V Universal Bidirectional Level Shifter with Automatic Direction Control

Block Diagram

Truth Table Inputs 1
xOE 2SEL 1SEL

Outputs Loading 2
Ordering Information

PI4ULS3V08ZFE

Note E = Pb-free Adding X Suffix= Tape/Reel

Package Code ZF

Package Lead free and Green 36-pin TQFN 5x6

Pericom Semiconductor Corporation  1-800-435-2336 

Pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom product. The company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom.
2013-07-0006

PT0487 07/12/13 7

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Datasheet ID: PI4ULS3V08ZFE 510067