PI2EQX4402NBE

PI2EQX4402NBE Datasheet

PI2EQX4402

Part	Datasheet
PI2EQX4402NBE	PI2EQX4402NBE (pdf)

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PI2EQX4402 2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer • Two High Speed PCI Express lanes • Supports PCI Express data rates Gbps on each lane • Adjustable Transmiter De-Emphasis & Amplitude • Adjustable Receiver Equalization • Two Spread Spectrum Reference Clock Buffer Outputs • 100Ω Differential CML I/O’s • Low Power 100mW per Channel • Standby Mode Power Down State • VDD Operating Range 1.8V +/-0.1V • Packaging Pb-free & Green : - 84-ball LFBGA Pericom Semiconductor’s PI2EQX4402 is a low power, PCI Express compliant signal re-driver. The device provides programmable equalization, and de-emphasis by using 7 select bits, SEL[0:6], to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. PI2EQX4402 supports four 100 Differential CML data I/O’s between the Protocol ASIC to a switch fabric, across a backplane, or extends the signals across other distant data pathways on the user’s platform. The integrated equalization circuitry provides with signal integrity of the PCI Express signal before the re-driver. Whereas the integrated de-emphasis circuitry provides with signal integrity of the PCI Express signal after the re-driver. In addition to providing signal re-conditioning, Pericom’s PI2EQX4402 also provides power management Stand-by mode operated by a Bus Enable pin. Block Diagram Pin Description Top View PS8778E 02/15/06 PI2EQX4402 2.5Gbps x2 Lane Serial PCI Express Repeater / Equalizer Pin Description Pin # B1, F1, D2, E2, B3, F3, H4, B8, F8, B10, F10 C3 D3 E1, J1, F2, E3, J3, H7, E8, J8, D9, E9, F9, E10, J10 C8 D8 G3 H3 G8 H8 A3, B4, B5 A4, C4, C5 G2, J2, J4 H2, K2, J5 B6, A5 C6, A6 K3, K4 J6, J9 B7, A7 C7, A8 K9, G9 K10, H9 Pin Name AI+ AI- BI+ BICI+ CIDI+ DISEL[0:2]_A SEL[0:2]_B SEL[0:2]_C SEL[0:2]_D SEL[3:4]_A SEL[3:4]_B SEL[3:4]_C SEL[3:4]_D SEL[5:6]_A SEL[5:6]_B SEL[5:6]_C SEL[5:6]_D H1 A9, A10, B9, C9 EN_ [A,B,C,D] 1.8V Supply Voltage Positive CML Input Channel A with internal 50Ω pull down Negative CML Input Channel A with internal 50Ω pull down Supply Ground Positive CML Input Channel B with internal 50Ω pull down Negative CML Input Channel B with internal 50Ω pull down Positive CML Input Channel C with internal 50Ω pull down Negative CML Input Channel C with internal 50Ω pull down Positive CML Input Channel D with internal 50Ω pull down Negative CML Input Channel D with internal 50Ω pull down Selection pins for equalizer see Table w/ 50KΩ internal pull up Selection pins for see Table w/ 50KΩ internal pull up Selection pins for De-Emphasis See De-Emphasis Table w/ 50KΩ internal pull up Positive CML Output Channel A internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CML Output Channel A with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Positive CML Output Channel B with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CMLOutput Channel B with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Positive CMLOutput Channel C with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CMLOutput Channel C with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Positive CMLOutput Channel D with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CMLOutput Channel D with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. EN_[A:D] is the enable pin with internal 50KΩ pull up resistor. A LVCMOS high provides normal operation. A LVCMOS low selects a low power down mode. PS8778E 02/15/06 PI2EQX4402 2.5Gbps x2 Lane Serial PCI Express Repeater / Equalizer Pin Description Continued Pin # Pin Name CKIN- CKIN+ K5, K6 OUT0+, OUT0- K7, K8 OUT1+, OUT1- Ordering Information Ordering Number PI2EQX4402NB PI2EQX4402NBE Package Code NB Package Description 84-Ball LFBGA Pb-free & Green 84-Ball LFBGA Pericom Semiconductor Corporation • 1-800-435-2336 • 7 PS8778E 02/15/06

PDF Datasheet Preview

PI2EQX4402
2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer
• Two High Speed PCI Express lanes
• Supports PCI Express data rates Gbps on each lane
• Adjustable Transmiter De-Emphasis & Amplitude
• Adjustable Receiver Equalization
• Two Spread Spectrum Reference Clock Buffer Outputs
• 100Ω Differential CML I/O’s
• Low Power 100mW per Channel
• Standby Mode Power Down State
• VDD Operating Range 1.8V +/-0.1V
• Packaging Pb-free & Green :
- 84-ball LFBGA

Pericom Semiconductor’s PI2EQX4402 is a low power, PCI Express compliant signal re-driver. The device provides programmable equalization, and de-emphasis by using 7 select bits, SEL[0:6], to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. PI2EQX4402 supports four 100 Differential CML data I/O’s between the Protocol ASIC to a switch fabric, across a backplane, or extends the signals across other distant data pathways on the user’s platform.

The integrated equalization circuitry provides with signal integrity of the PCI Express signal before the re-driver. Whereas the integrated de-emphasis circuitry provides with signal integrity of the PCI Express signal after the re-driver.

In addition to providing signal re-conditioning, Pericom’s PI2EQX4402 also provides power management Stand-by mode operated by a Bus Enable pin.

Block Diagram

Pin Description Top View

PS8778E
02/15/06

PI2EQX4402 2.5Gbps x2 Lane Serial PCI Express Repeater / Equalizer

Pin Description

Pin # B1, F1, D2, E2, B3, F3, H4, B8,

F8, B10, F10 C3 D3

E1, J1, F2, E3, J3, H7, E8, J8, D9, E9, F9, E10, J10 C8 D8 G3 H3 G8 H8 A3, B4, B5 A4, C4, C5 G2, J2, J4 H2, K2, J5 B6, A5 C6, A6 K3, K4 J6, J9 B7, A7 C7, A8 K9, G9 K10, H9

Pin Name

AI+ AI-

BI+ BICI+ CIDI+ DISEL[0:2]_A SEL[0:2]_B SEL[0:2]_C SEL[0:2]_D SEL[3:4]_A SEL[3:4]_B SEL[3:4]_C SEL[3:4]_D SEL[5:6]_A SEL[5:6]_B SEL[5:6]_C SEL[5:6]_D

H1 A9, A10, B9, C9

EN_ [A,B,C,D]
1.8V Supply Voltage

Positive CML Input Channel A with internal 50Ω pull down Negative CML Input Channel A with internal 50Ω pull down

Supply Ground

Positive CML Input Channel B with internal 50Ω pull down Negative CML Input Channel B with internal 50Ω pull down Positive CML Input Channel C with internal 50Ω pull down Negative CML Input Channel C with internal 50Ω pull down Positive CML Input Channel D with internal 50Ω pull down Negative CML Input Channel D with internal 50Ω pull down

Selection pins for equalizer see Table w/ 50KΩ internal pull up

Selection pins for see Table w/ 50KΩ internal pull up

Selection pins for De-Emphasis See De-Emphasis Table w/ 50KΩ internal pull up

Positive CML Output Channel A internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CML Output Channel A with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Positive CML Output Channel B with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CMLOutput Channel B with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Positive CMLOutput Channel C with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CMLOutput Channel C with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Positive CMLOutput Channel D with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. Negative CMLOutput Channel D with internal 50Ω pull up during normal operation and 2KΩ pull up otherwise. EN_[A:D] is the enable pin with internal 50KΩ pull up resistor. A LVCMOS high provides normal operation. A LVCMOS low selects a low power down mode.

PS8778E
02/15/06

PI2EQX4402 2.5Gbps x2 Lane Serial PCI Express Repeater / Equalizer

Pin Description Continued

Pin #

Pin Name

CKIN-

CKIN+

K5, K6

OUT0+, OUT0-

K7, K8

OUT1+, OUT1-
Ordering Information
Ordering Number PI2EQX4402NB PI2EQX4402NBE

Package Code NB

Package Description 84-Ball LFBGA

Pb-free & Green 84-Ball LFBGA

Pericom Semiconductor Corporation
• 1-800-435-2336
• 7

PS8778E
02/15/06

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Datasheet ID: PI2EQX4402NBE 510037