SL811HS

SL811HS Datasheet

SL811HS

Part	Datasheet
SL811HS	SL811HS (pdf)

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SL811HS SL811HS Embedded USB Host/Slave Controller • First USB Host/Slave controller for embedded systems in the market with a standard microprocessor bus interface • Supports both full speed 12 Mbps and low speed Mbps USB transfer in both master and slave modes • Conforms to USB Specification for full- and low speed • Operates as a single USB host or slave under software control • Automatic detection of either low- or full speed devices • 8-bit bidirectional data, port I/O DMA supported in slave mode • On-chip SIE and USB transceivers • On-chip single root HUB support • 256-byte internal SRAM buffer • Ping-pong buffers for improved performance • Operates from 12 or 48 MHz crystal or oscillator built-in DPLL • 5V-tolerant interface • Suspend/resume, wake up, and low-power modes are supported • Auto-generation of SOF and CRC5/16 • Auto-address increment mode, saves memory READ/WRITE cycles • Development kit including source code drivers is available • 3.3V power source, micron CMOS technology • Available in both a 28-pin PLCC package and a 48-pin TQFP package Introduction The SL811HS is an Embedded USB Host/Slave Controller capable of communicating in either full speed or low speed. The SL811HS interfaces to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification The SL811HS incorporates USB Serial Interface functionality along with internal full or low speed transceivers. The SL811HS supports and operates in USB full speed mode at 12 Mbps, or in low speed mode at Mbps. When in host mode, the SL811HS is the master and controls the USB bus and the devices that are connected to it. In peripheral mode, otherwise known as a slave device, the SL811HS operates as a variety of full- or low speed devices. The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. The SL811HS has 256-bytes of internal RAM which is used for control registers and data buffer. The available package types offered are a 28-pin PLCC SL811HS and the lead-free packages are a 28-pin SL811HS-JCT and a 48-pin SL811HST-AXC package. All packages operate at VDC. The I/O interface logic is 5V-tolerant. Block Diagram M aster/Slave Controller INTERRUPT CONTROLLER INTR Root HUB XCVRS SERIAL INTERFACE ENGINE 256 Byte RAM BUFFERS & CONTROL REGISTERS DMA Interface nDRQ nDACK CLOCK GENERATOR PROCESSOR INTERFACE nWR nRD nCS nRST D0-7 • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 SL811HS Data Port, Microprocessor Interface The SL811HS microprocessor interface provides an 8-bit bidirectional data path along with appropriate control lines to interface to external processors or controllers. Programmed I/O or memory mapped I/O designs are supported through the 8-bit interface, chip select, read and write input strobes, and a single address line, A0. Access to memory and control register space is a simple two step process, requiring an address Write with A0 = ’0’, followed by a register/memory Read or Write cycle with address line A0 = In addition, a DMA bidirectional interface in slave mode is available with handshake signals such as nDRQ, nDACK, nWR, nRD, nCS and INTRQ. The SL811HS WRITE or READ operation terminates when either nWR or nCS goes inactive. For devices interfacing to the SL811HS that deactivate the Chip Select nCS before the Write nWR, the data hold timing must be measured from the nCS and will be the same value as specified. Therefore, both and Motorola-type CPUs work easily with the SL811HS without any external glue logic requirements. DMA Controller slave mode only Ordering Information Part Number SL811HS-JCT SL811HST-AXC 28-pin PLCC 28-pin Lead free 48-pin Lead free Package Type Typ. ns Max. 11 ns 11 ns 55% Package Diagrams PIN #1 ID 4 28-Lead Plastic Leaded Chip Carrier J64 DIMENSIONS IN INCHES MIN. MAX. SEATING PLANE 19 18 MIN. 51-85001-A Page 30 of 32 Package Diagrams continued 48-Lead Thin Plastic Quad Flat Pack 7x7x1.4 mm A48 SL811HS 51-85135-* Intel is a registered trademark of Intel Corporation. Torex is a trademark of Torex Semiconductors, Ltd. SL811HS is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Page 31 of 32 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. SL811HS Document History Page Document Title SL811HS Embedded USB Host/Slave Controller Document Number 38-08008 ECN NO. Issue Date Orig. of Change Description of Change 110850 12/14/01 BHA Converted to Cypress format from ScanLogic 112687 03/22/02 MUL 1 Changed power supply voltage to 4.0V in section 2 Changed value of twdsu in section 3 Changed max. power supply voltage to V in section 4 Changed accuracy of adjustment in section 5 Changed bits 0 and 1 to reserved in section 6 Changed bit 2 to reserved in section and 7 Changed bit 2 to reserved in section 8 Changed definition of bit 6 in section & 9 Added section Register Values on Power Up and Reset 10 Changed bit description notes in section ARI Added lead free part numbers to new section Ordering Information and corrected references made to these parts. Corrected grammar. Added compliance statement in section USB Host Transceiver Characteristics. 749518 See ECN ARI Implemented the new template. Changed Figure Labels on pins 2 and 3 were swapped this has been corrected. Combined the 48-pin TQFP AXC Pin Assignment and Definition table with the 28-pin PLCC Pin Assignment and Definition table. Removed all instances of SL811HST-AC. Corrected the variables. Removed references to the obsolete SL11H. Page 32 of 32

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SL811HS

SL811HS Embedded USB Host/Slave Controller
• First USB Host/Slave controller for embedded systems in the market with a standard microprocessor bus interface
• Supports both full speed 12 Mbps and low speed Mbps USB transfer in both master and slave modes
• Conforms to USB Specification for full- and low speed
• Operates as a single USB host or slave under software
control
• Automatic detection of either low- or full speed devices
• 8-bit bidirectional data, port I/O DMA supported in slave
mode
• On-chip SIE and USB transceivers
• On-chip single root HUB support
• 256-byte internal SRAM buffer
• Ping-pong buffers for improved performance
• Operates from 12 or 48 MHz crystal or oscillator built-in

DPLL
• 5V-tolerant interface
• Suspend/resume, wake up, and low-power modes are
supported
• Auto-generation of SOF and CRC5/16
• Auto-address increment mode, saves memory

READ/WRITE cycles
• Development kit including source code drivers is available
• 3.3V power source, micron CMOS technology
• Available in both a 28-pin PLCC package and a 48-pin

TQFP package

Introduction

The SL811HS is an Embedded USB Host/Slave Controller capable of communicating in either full speed or low speed. The SL811HS interfaces to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification

The SL811HS incorporates USB Serial Interface functionality along with internal full or low speed transceivers. The SL811HS supports and operates in USB full speed mode at 12 Mbps, or in low speed mode at Mbps. When in host mode, the SL811HS is the master and controls the USB bus and the devices that are connected to it. In peripheral mode, otherwise known as a slave device, the SL811HS operates as a variety of full- or low speed devices.

The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. The SL811HS has 256-bytes of internal RAM which is used for control registers and data buffer.

The available package types offered are a 28-pin PLCC SL811HS and the lead-free packages are a 28-pin SL811HS-JCT and a 48-pin SL811HST-AXC package. All packages operate at VDC. The I/O interface logic is 5V-tolerant.

Block Diagram

M aster/Slave Controller

INTERRUPT CONTROLLER

INTR

Root HUB

XCVRS

SERIAL INTERFACE

ENGINE
256 Byte RAM

BUFFERS &

CONTROL REGISTERS

DMA Interface
nDRQ nDACK

CLOCK GENERATOR

PROCESSOR INTERFACE
nWR nRD nCS nRST

D0-7
• 198 Champion Court
• San Jose, CA 95134-1709
• 408-943-2600

SL811HS

Data Port, Microprocessor Interface

The SL811HS microprocessor interface provides an 8-bit bidirectional data path along with appropriate control lines to interface to external processors or controllers. Programmed I/O or memory mapped I/O designs are supported through the 8-bit interface, chip select, read and write input strobes, and a single address line, A0.

Access to memory and control register space is a simple two step process, requiring an address Write with A0 = ’0’, followed by a register/memory Read or Write cycle with address line A0 =

In addition, a DMA bidirectional interface in slave mode is available with handshake signals such as nDRQ, nDACK, nWR, nRD, nCS and INTRQ.

The SL811HS WRITE or READ operation terminates when either nWR or nCS goes inactive. For devices interfacing to the SL811HS that deactivate the Chip Select nCS before the Write nWR, the data hold timing must be measured from the nCS and will be the same value as specified. Therefore, both and Motorola-type CPUs work easily with the SL811HS without any external glue logic requirements.

DMA Controller slave mode only
Ordering Information

Part Number SL811HS-JCT SL811HST-AXC
28-pin PLCC 28-pin Lead free 48-pin Lead free

Package Type

Typ. ns

Max.
11 ns 11 ns 55%

Package Diagrams

PIN #1 ID 4
28-Lead Plastic Leaded Chip Carrier J64

DIMENSIONS IN INCHES MIN. MAX.

SEATING PLANE
19 18

MIN. 51-85001-*A

Page 30 of 32

Package Diagrams continued
48-Lead Thin Plastic Quad Flat Pack 7x7x1.4 mm A48

SL811HS
51-85135-**

Intel is a registered trademark of Intel Corporation. Torex is a trademark of Torex Semiconductors, Ltd. SL811HS is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders.

Page 31 of 32

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

SL811HS

Document History Page

Document Title SL811HS Embedded USB Host/Slave Controller Document Number 38-08008

ECN NO. Issue Date

Orig. of Change

Description of Change
110850 12/14/01

BHA Converted to Cypress format from ScanLogic
112687 03/22/02

MUL 1 Changed power supply voltage to 4.0V in section
2 Changed value of twdsu in section
3 Changed max. power supply voltage to V in section
4 Changed accuracy of adjustment in section
5 Changed bits 0 and 1 to reserved in section
6 Changed bit 2 to reserved in section and
7 Changed bit 2 to reserved in section
8 Changed definition of bit 6 in section &
9 Added section Register Values on Power Up and Reset
10 Changed bit description notes in section
ARI Added lead free part numbers to new section Ordering Information and
corrected references made to these parts. Corrected grammar. Added
compliance statement in section USB Host Transceiver Characteristics.
749518 See ECN

ARI Implemented the new template. Changed Figure Labels on pins 2 and 3
were swapped this has been corrected.

Combined the 48-pin TQFP AXC Pin Assignment and Definition table with the 28-pin PLCC Pin Assignment and Definition table. Removed all instances of SL811HST-AC. Corrected the variables. Removed references to the obsolete SL11H.

Page 32 of 32

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived SL811HS Datasheet file may be downloaded here without warranties.

Datasheet ID: SL811HS 508330