SL11R-DK

SL11R-DK Datasheet

SL11R

Part	Datasheet
SL11R-DK	SL11R-DK (pdf)

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SL11R SL11R USB Controller/ 16-Bit RISC Processor Data Sheet Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 SL11R Table of Contents DEFINITIONS 8 REFERENCES 8 INTRODUCTION 8 Overview 8 SL11R Features 8 SL11R 16-Bit RISC Processor 10 3Kx16 Mask ROM and BIOS 10 Internal RAM 10 Clock Generator 11 USB Interface 11 Processor Control Registers 11 Interrupts 11 UART Interface 11 *2-wire Serial EEPROM Interface 11 External SRAM/DRAM/EPROM Interface 11 General Timers and Watch Dog Timer 11 Special GPIO Functionality for Suspend, Resume and Low Power modes 11 Programmable Pulse/PWM Interface 11 Mailbox and DMA Overview 12 Mailbox Interface 12 DMA Interface 13 Fast DMA Mode 14 SL11R Interface Modes 14 General Purpose IO mode GPIO 15 8/16-bit DMA Mode 15 Fast EPP Mode 15 DVC 8-bit DMA Mode INTERFACE 15 Internal Masked ROM 0xE800-0xFFFF 15 External ROM 0xC100-0xE800 15 Internal RAM 0x0000-0x0BFF 16 Clock Generator 16 USB Interface 18 USB Global Control & Status Register 0xC080 R/W USB Frame Number Register 0xC082 Read Only 18 USB Address Register 0xC084 R/W USB Command Done Register 0xC086 Write Only 19 USB Endpoint 0 Control & Status Register 0xC090 R/W 19 USB Endpoint 1 Control & Status Register 0xC092 R/W 19 USB Endpoint 2 Control & Status Register 0xC094 R/W 19 USB Endpoint 3 Control & Status Register 0xC096 R/W 19 General Description for All Endpoints from Endpoint 0 to Endpoint 3 19 USB Endpoints Control For Writing 19 USB Endpoints Status For Reading 20 USB Endpoint 0 Address Register 0x0120 R/W 20 USB Endpoint 1 Address Register 0x0124 R/W 20 USB Endpoint 2 Address Register 0x0128 R/W 20 USB Endpoint 3 Address Register 0x012C R/W Page 2 of 85 SL11R Table of Contents continued USB Endpoint 0 Count Register 0x0122 R/W 20 USB Endpoint 1 Count Register 0x0126 R/W 20 USB Endpoint 2 Count Register 0x012A R/W 20 USB Endpoint 3 Count Register 0x012E R/W 21 Processor Control Registers 21 Configuration Register 0xC006 R/W 21 Speed Control Register 0xC008 R/W 22 Power Down Control Register 0xC00A R/W 23 Breakpoint Register 0xC014 R/W 23 Interrupts 23 Hardware Interrupts 24 Interrupt Enable Register 0xC00E R/W GPIO Interrupt Control Register 0xC01C R/W 25 Software Interrupts 25 UART Interface. 27 UART Control Register 0xC0E0 R/W 27 UART Status Register 0xC0E2 Read Only 28 UART Transmit Data Register 0xC0E4 Write Only 28 UART Receive Data Register 0xC0E4 Read Only 28 Serial EEPROM Interface 2-wire serial interface 28 External SRAM, EPROM, DRAM 29 Memory Control Register 0xC03E R/W Extended Memory Control Register 0xC03A R/W 30 Extended Page 1 Map Register 0xC018 R/W 30 Extended Page 2 Map Register 0xC01A R/W 31 DRAM Control Register 0xC038 R/W 31 Memory Map 31 General Timers and Watch Dog Timer 33 Timer 0 Count Register 0xC010 R/W 33 Timer 1 Count Register 0xC012 R/W 33 Watchdog Timer Count & Control Register 0xC00C R/W 33 Special GPIO Function for Suspend, Resume and Low-Power modes 33 Programmable Pulse/PWM Interface 34 PWM Control Register 0xC0E6 R/W 34 PWM Maximum Count Register 0xC0E8 R/W 35 PWM Channel 0 Start Register 0xC0EA R/W 35 PWM Channel 0 Stop Register 0xC0EC R/W 36 PWM Channel 1 Start Register 0xC0EE R/W 36 PWM Channel 1 Stop Register 0xC0F0 R/W 36 PWM Channel 2 Start Register 0xC0F2 R/W 36 PWM Channel 2 Stop Register 0xC0F4 R/W 36 PWM Channel 3 Start Register 0xC0F6 R/W 36 PWM Channel 3 Stop Register 0xC0F8 R/W 37 PWM Cycle Count Register 0xC0FA R/W Fast DMA Mode 37 DMA Control Register 0xC02A R/W 37 Low DMA Start Address Register 0xC02C R/W 37 High DMA Start Address Register 0xC02E R/W 38 Low DMA Stop Address Register 0xC030 R/W High DMA Stop Address Register 0xC032 R/W 38 Page 3 of 85 SL11R Table of Contents continued SL11R INTERFACE MODES 38 General Purpose IO mode GPIO 38 I/O Control Register 0 0xC022 R/W 39 I/O Control Register 1 0xC028 R/W 39 Output Data Register 0 0xC01E R/W 39 Output Data Register 1 0xC024 R/W 39 Input Data Register 0 0xC020 Read only 39 Input Data Register 1 0xC026 Read only 39 8/16-bit DMA Mode 40 Mailbox Protocol 41 INBUFF Data Register 0xC0C4 R/W OUTBUFF Data Register 0xC0C4 R/W 41 STATUS Register 0xC0C2 Read Only 42 DMA Protocol 42 DMA Control Register 0xC0C0 R/W Fast EPP Mode 42 EPP Data Register 0xC040 R/W 43 EPP Address Register 0xC044 R/W EPP Address Buffer Read Register 0xC046 Read Only 43 EPP Data Buffer Read Register 0xC042 Read Only 43 EPP Status Data Register 0xC04E R/W 43 EPP P_REG Register 0xC050 R/W 44 Serial Interface Registers 44 Serial Interface Control & Status Register 44 Serial Interface Address Register 44 Serial Interface Data Write 44 Serial Interface Data Read Register 45 DVC 8-bit DMA Mode 45 Video Status Register 45 Camera Serial Interface Registers Serial Interface Control & Status Register 0xC068 R/W 46 Serial Interface Address Register 0xC06A Write Only 46 Serial Interface Data Write Register 0xC06C Write Only 46 Serial Interface Data Read Register 0xC06C Read Only 47 I/O Address Map 47 PHYSICAL CONNECTION 49 Package Type 49 GPIO and 8/16-Bit DMA Assignment and Description 49 Fast EPP Pin Assignment and Description 52 DVC 8-Bit DMA Mode Pin Assignment and Description 54 SL11R CPU PROGRAMMING GUIDE 57 Instruction Set Overview 57 Reset Vector 57 Register Set 57 General-Purpose Registers 57 General Purpose/Address Registers 58 REGBANK Register 0xC002 R/W 58 Flags Register 0xC000 Read Only 58 Instruction Format 58 Page 4 of 85 SL11R Table of Contents continued Addressing Modes 59 Register Addressing 59 Immediate Addressing 59 Direct Addressing 59 Indirect Addressing 59 Indirect Addressing with Auto Increment 60 Indirect Addressing with Offset 60 Stack Pointer R15 Special Handling 60 Dual Operand Instructions 60 Program Control Instructions 62 Single Operand Operation Instructions 63 Miscellaneous Instructions 65 Built-in Macros 65 SL11R Processor Instruction Set Summary 66 SL11R - ELECTRICAL SPECIFICATION 67 Absolute Maximum Ratings 67 Recommended Operating Conditions 67 Crystal Requirements XTAL1, XTAL2 68 External Clock Input Characteristics XTAL1 68 SL11R DC Characteristics 68 SL11R USB Transceiver Characteristics 69 SL11R Reset Timing 69 SL11R Clock Timing Specifications 69 8/16-bit DMA & DVC 8-bit DMA Mode SDATA Port I/O Read Cycle Non-DMA 70 8/16-bit DMA & DVC 8-bit DMA Mode SDATA Port I/O Write Cycle Non-DMA 71 8/16-bit DMA & DVC 8-bit DMA Mode SDATA, DMA Read Cycle 72 8/16-bit DMA & DVC 8-bit DMA Mode SDATA, DMA Write Cycle 72 SL11R Signals Name convention 72 SL11R DRAM Timing 73 SL11R DRAM Read Cycle 74 SL11R DRAM Write Cycle 75 SL11R CAS-Before-RAS Refresh Cycle 76 SL11R DRAM Page Mode Read Cycle 77 DRAM Page Mode Write Cycle 78 SL11R SRAM Read Cycle 79 SL11R SRAM Write Cycle 80 2-Wire Serial Interface EEPROM Timing 81 Fast EPP Data/Address Read Cycle 82 Fast EPP Data/Address Write Cycle 82 PACKAGE INFORMATION 83 Drawings and Dimensions 83 Package Markings 84 Thermal Specifications 84 Page 5 of 85 SL11R List of Figures

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SL11R

SL11R USB Controller/ 16-Bit RISC Processor Data Sheet

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose
• CA 95134
• 408-943-2600

SL11R

Table of Contents

DEFINITIONS 8

REFERENCES 8

INTRODUCTION 8

Overview 8 SL11R Features 8 SL11R 16-Bit RISC Processor 10 3Kx16 Mask ROM and BIOS 10 Internal RAM 10 Clock Generator 11 USB Interface 11 Processor Control Registers 11 Interrupts 11 UART Interface 11 *2-wire Serial EEPROM Interface 11 External SRAM/DRAM/EPROM Interface 11 General Timers and Watch Dog Timer 11 Special GPIO Functionality for Suspend, Resume and Low Power modes 11 Programmable Pulse/PWM Interface 11 Mailbox and DMA Overview 12 Mailbox Interface 12 DMA Interface 13 Fast DMA Mode 14 SL11R Interface Modes 14

General Purpose IO mode GPIO 15 8/16-bit DMA Mode 15 Fast EPP Mode 15 DVC 8-bit DMA Mode

INTERFACE 15

Internal Masked ROM 0xE800-0xFFFF 15 External ROM 0xC100-0xE800 15 Internal RAM 0x0000-0x0BFF 16 Clock Generator 16 USB Interface 18

USB Global Control & Status Register 0xC080 R/W USB Frame Number Register 0xC082 Read Only 18 USB Address Register 0xC084 R/W USB Command Done Register 0xC086 Write Only 19 USB Endpoint 0 Control & Status Register 0xC090 R/W 19 USB Endpoint 1 Control & Status Register 0xC092 R/W 19 USB Endpoint 2 Control & Status Register 0xC094 R/W 19 USB Endpoint 3 Control & Status Register 0xC096 R/W 19 General Description for All Endpoints from Endpoint 0 to Endpoint 3 19 USB Endpoints Control For Writing 19 USB Endpoints Status For Reading 20 USB Endpoint 0 Address Register 0x0120 R/W 20 USB Endpoint 1 Address Register 0x0124 R/W 20 USB Endpoint 2 Address Register 0x0128 R/W 20 USB Endpoint 3 Address Register 0x012C R/W

Page 2 of 85

SL11R

Table of Contents continued

USB Endpoint 0 Count Register 0x0122 R/W 20 USB Endpoint 1 Count Register 0x0126 R/W 20 USB Endpoint 2 Count Register 0x012A R/W 20 USB Endpoint 3 Count Register 0x012E R/W 21 Processor Control Registers 21 Configuration Register 0xC006 R/W 21 Speed Control Register 0xC008 R/W 22 Power Down Control Register 0xC00A R/W 23 Breakpoint Register 0xC014 R/W 23 Interrupts 23 Hardware Interrupts 24 Interrupt Enable Register 0xC00E R/W GPIO Interrupt Control Register 0xC01C R/W 25 Software Interrupts 25 UART Interface. 27 UART Control Register 0xC0E0 R/W 27 UART Status Register 0xC0E2 Read Only 28 UART Transmit Data Register 0xC0E4 Write Only 28 UART Receive Data Register 0xC0E4 Read Only 28 Serial EEPROM Interface 2-wire serial interface 28 External SRAM, EPROM, DRAM 29 Memory Control Register 0xC03E R/W Extended Memory Control Register 0xC03A R/W 30 Extended Page 1 Map Register 0xC018 R/W 30 Extended Page 2 Map Register 0xC01A R/W 31 DRAM Control Register 0xC038 R/W 31 Memory Map 31 General Timers and Watch Dog Timer 33 Timer 0 Count Register 0xC010 R/W 33 Timer 1 Count Register 0xC012 R/W 33 Watchdog Timer Count & Control Register 0xC00C R/W 33 Special GPIO Function for Suspend, Resume and Low-Power modes 33 Programmable Pulse/PWM Interface 34 PWM Control Register 0xC0E6 R/W 34 PWM Maximum Count Register 0xC0E8 R/W 35 PWM Channel 0 Start Register 0xC0EA R/W 35 PWM Channel 0 Stop Register 0xC0EC R/W 36 PWM Channel 1 Start Register 0xC0EE R/W 36 PWM Channel 1 Stop Register 0xC0F0 R/W 36 PWM Channel 2 Start Register 0xC0F2 R/W 36 PWM Channel 2 Stop Register 0xC0F4 R/W 36 PWM Channel 3 Start Register 0xC0F6 R/W 36 PWM Channel 3 Stop Register 0xC0F8 R/W 37 PWM Cycle Count Register 0xC0FA R/W Fast DMA Mode 37 DMA Control Register 0xC02A R/W 37 Low DMA Start Address Register 0xC02C R/W 37 High DMA Start Address Register 0xC02E R/W 38 Low DMA Stop Address Register 0xC030 R/W High DMA Stop Address Register 0xC032 R/W 38

Page 3 of 85

SL11R

Table of Contents continued

SL11R INTERFACE MODES 38

General Purpose IO mode GPIO 38 I/O Control Register 0 0xC022 R/W 39 I/O Control Register 1 0xC028 R/W 39 Output Data Register 0 0xC01E R/W 39 Output Data Register 1 0xC024 R/W 39 Input Data Register 0 0xC020 Read only 39 Input Data Register 1 0xC026 Read only 39
8/16-bit DMA Mode 40 Mailbox Protocol 41 INBUFF Data Register 0xC0C4 R/W OUTBUFF Data Register 0xC0C4 R/W 41 STATUS Register 0xC0C2 Read Only 42 DMA Protocol 42 DMA Control Register 0xC0C0 R/W

Fast EPP Mode 42 EPP Data Register 0xC040 R/W 43 EPP Address Register 0xC044 R/W EPP Address Buffer Read Register 0xC046 Read Only 43 EPP Data Buffer Read Register 0xC042 Read Only 43 EPP Status Data Register 0xC04E R/W 43 EPP P_REG Register 0xC050 R/W 44 Serial Interface Registers 44

Serial Interface Control & Status Register 44 Serial Interface Address Register 44 Serial Interface Data Write 44 Serial Interface Data Read Register 45

DVC 8-bit DMA Mode 45 Video Status Register 45 Camera Serial Interface Registers Serial Interface Control & Status Register 0xC068 R/W 46 Serial Interface Address Register 0xC06A Write Only 46 Serial Interface Data Write Register 0xC06C Write Only 46 Serial Interface Data Read Register 0xC06C Read Only 47 I/O Address Map 47

PHYSICAL CONNECTION 49

Package Type 49 GPIO and 8/16-Bit DMA Assignment and Description 49 Fast EPP Pin Assignment and Description 52 DVC 8-Bit DMA Mode Pin Assignment and Description 54

SL11R CPU PROGRAMMING GUIDE 57

Instruction Set Overview 57 Reset Vector 57 Register Set 57 General-Purpose Registers 57 General Purpose/Address Registers 58 REGBANK Register 0xC002 R/W 58 Flags Register 0xC000 Read Only 58 Instruction Format 58

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SL11R

Table of Contents continued

Addressing Modes 59 Register Addressing 59 Immediate Addressing 59 Direct Addressing 59 Indirect Addressing 59 Indirect Addressing with Auto Increment 60 Indirect Addressing with Offset 60 Stack Pointer R15 Special Handling 60 Dual Operand Instructions 60 Program Control Instructions 62 Single Operand Operation Instructions 63 Miscellaneous Instructions 65 Built-in Macros 65 SL11R Processor Instruction Set Summary 66

SL11R - ELECTRICAL SPECIFICATION 67

Absolute Maximum Ratings 67 Recommended Operating Conditions 67 Crystal Requirements XTAL1, XTAL2 68 External Clock Input Characteristics XTAL1 68 SL11R DC Characteristics 68 SL11R USB Transceiver Characteristics 69 SL11R Reset Timing 69 SL11R Clock Timing Specifications 69 8/16-bit DMA & DVC 8-bit DMA Mode SDATA Port I/O Read Cycle Non-DMA 70 8/16-bit DMA & DVC 8-bit DMA Mode SDATA Port I/O Write Cycle Non-DMA 71 8/16-bit DMA & DVC 8-bit DMA Mode SDATA, DMA Read Cycle 72 8/16-bit DMA & DVC 8-bit DMA Mode SDATA, DMA Write Cycle 72 SL11R Signals Name convention 72 SL11R DRAM Timing 73 SL11R DRAM Read Cycle 74 SL11R DRAM Write Cycle 75 SL11R CAS-Before-RAS Refresh Cycle 76 SL11R DRAM Page Mode Read Cycle 77 DRAM Page Mode Write Cycle 78 SL11R SRAM Read Cycle 79 SL11R SRAM Write Cycle 80 2-Wire Serial Interface EEPROM Timing 81 Fast EPP Data/Address Read Cycle 82 Fast EPP Data/Address Write Cycle 82

PACKAGE INFORMATION 83

Drawings and Dimensions 83 Package Markings 84 Thermal Specifications 84

Page 5 of 85

SL11R

List of Figures

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Datasheet ID: SL11R-DK 508329