S70GL02GP11FFIR22

S70GL02GP11FFIR22 Datasheet

S70GL02GP

Part	Datasheet
S70GL02GP11FFIR22	S70GL02GP11FFIR22 (pdf)

Related Parts	Information
S70GL02GP11FAIR12	S70GL02GP11FAIR12
S70GL02GP11FAIR13	S70GL02GP11FAIR13
S70GL02GP11FAIR20	S70GL02GP11FAIR20
S70GL02GP11FAIR23	S70GL02GP11FAIR23
S70GL02GP11FAIR10	S70GL02GP11FAIR10

PDF Datasheet Preview
S70GL02GP 2 Gbit, 3V Page Mode S70GL-P Flash The Cypress S70GL02GP 2 Gbit Mirrorbit Flash device is fabricated on 90-nm process technology. This device offers a fast page access time of 25 ns with a corresponding random access time of 110 ns. It features a Write Buffer that allows a maximum of 32 words/64 bytes to be programmed in one operation, resulting in faster effective programming time than standard single byte/word programming algorithms. This makes the device an ideal product for today’s embedded applications that require higher density, better performance and lower power consumption. This document contains information for the S70GL02GP device, which is a dual die stack of two S29GL01GP die. For detailed specifications, refer to the discrete die datasheet provided in Table Table Affected Documents/Related Documents Title S29GL01GP, S29GL512P, S29GL256P, S29GL128P 1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit Process Technology Publication Number 002-00886 Distinctive Characteristics Two 1024 Mbit S29GL01GP in a single 64-ball FortifiedBGA package see S29GL01P datasheet for full specifications Single 3V read/program/erase 3.0V - 3.6V 90 nm MirrorBit process technology 8-word/16-byte page read buffer 32-word/64-byte write buffer reduces overall programming time for multiple-word writes Secured Silicon Sector region 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number Can be programmed and locked at the factory or by the customer Uniform 64Kword/128KByte Sector Architecture S70GL02GP two thousand forty-eight sectors 100,000 erase cycles per sector typical 20-year data retention typical Offered Packages 64-ball Fortified BGA Suspend and Resume commands for Program and Erase operations Write operation status bits indicate program and erase operation completion Unlock Bypass Program command to reduce programming time Support for Common Flash Interface CFI Persistent and Password methods of Advanced Sector Protection WP#/ACC input Accelerates programming time when VACC is applied for greater throughput during system production Protects first or last sector of each die, regardless of sector protection settings Hardware reset input RESET# resets device Ready/Busy# output RY/BY# detects program or erase cycle completion • San Jose, CA 95134-1709 • 408-943-2600 Performance Characteristics Max. Read Access Times ns Note 1 Parameter Random Access Time tACC Page Access Time tPACC CE# Access Time tCE OE# Access Time tOE Notes Access times are dependent on VCC and VIO operating ranges. See Ordering Information on page 4 for further details. Contact a sales representative for availability. Random Access Read 8-Word Page Read Program/Erase Standby Current Consumption typical values 30 mA 1 mA 50 mA 2 µA Program & Erase Times typical values Single Word Programming Effective Write Buffer Programming VCC Per Word Effective Write Buffer Programming VACC Per Word Sector Erase Time 64 Kword Sector 60 µs 15 µs 15 µs S70GL02GP Page 2 of 11 S70GL02GP Contents Ordering Information 4 Recommended 4 Input/Output Description and Logic Symbol............. 5 Special Handling Instructions for BGA Package............ 6 ball Fortified Ball Grid Array, 13 11 mm 7 Page 3 of 11 S70GL02GP Ordering Information The ordering part number is formed by a valid combination of the following: S70GL02GP PACKING TYPE 0 = Tray standard see Note 3 2 = 7” Tape and Reel 3 = 13” Tape and Reel MODEL NUMBER VIO range, protection when WP# =VIL R1 = VIO = VCC = to 3.6V, highest address sector protected R2 = VIO = VCC = to 3.6V, lowest address sector protected TEMPERATURE RANGE I = Industrial °C to +85 °C = Commercial 0 °C to +85 °C PACKAGE MATERIALS SET A = Pb Note 1 F = Pb-free PACKAGE TYPE F = Fortified Ball Grid Array, mm pitch package SPEED OPTION 11 = 110 ns DEVICE NUMBER/DESCRIPTION S70GL02GP 3.0V-only, 2048 Megabit 128 M x 16-Bit/256 M x 8-Bit Page-Mode Flash Memory Manufactured on 90 nm MirrorBit process technology Recommended Combinations Recommended Combinations table below list various configurations planned to be available in volume. The table below will be updated as new combinations are released. Check with your local sales representative to confirm availability of specific configuration not listed or to check on newly released combinations. Base OPN Speed ns S29GL-P Recommended Combinations Note 1 Package and Temperature Model Number Packing Type S70GL02GP FFC, FAC Note 2 R1, R2 0, 2, 3 Note 3 Notes Contact a local sales representative for availability. BGA package marking omits leading “S29” and packing type designator from ordering part number. Packing Type “0” is standard option. Ordering Part Number x = Packing Type S70GL02GP11FFCR1x S70GL02GP11FFCR2x S70GL02GP11FACR1x S70GL02GP11FACR2x Page 4 of 11 S70GL02GP Input/Output Description and Logic Symbol Table 1 identifies the input and output package connections provided on the device. Table Input/Output Description DQ15/A-1 CE# OE# WE# VCC VIO VSS RY/BY# BYTE# RESET# WP#/ACC Type Input I/O Input Supply Output Input Input No Connect Description Address lines for GL02GP Data input/output. DQ15 Data input/output in word mode. A-1 LSB address input in byte mode. Chip Enable. Output Enable. Write Enable. Device Power Supply. Versatile IO Input. Ground. Ready/Busy. Indicates whether an Embedded Algorithm is in progress or complete. At VIL, the device is actively erasing or programming. At High Z, the device is in ready. Selects data bus width. At VIL, the device is in byte configuration and data I/O pins DQ0-DQ7 are active. At VIH, the device is in word configuration and data I/O pins DQ0-DQ15 are active. Hardware Reset. Low = device resets and returns to reading array data. Write Protect/Acceleration Input. At VIL, disables program and erase functions in the outermost sectors. At VHH, accelerates programming automatically places device in unlock bypass mode. Should be at VIH for all other conditions. Not connected internally. Page 5 of 11 S70GL02GP Special Handling Instructions for BGA Package Special handling is required for Flash Memory products in BGA packages. Flash memory devices in BGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. Figure 64-ball Fortified Ball Grid Array 64-ball Fortified BGA Top View, Balls Facing Down A16 BYTE# DQ15/A-1 VSS DQ7 DQ14 DQ13 DQ6 WE# RESET# A21 DQ12 RY/BY# WP#/ACC A18 DQ2 DQ10 DQ11 DQ3 Page 6 of 11 S70GL02GP ball Fortified Ball Grid Array, 13 11 mm Figure Fortified Ball Grid Array FBGA , 13 x 11 mm PACKAGE JEDEC LSE 064 N/A SYMBOL A A1 A2 D E D1 E1 MD ME n Øb eE eD SD / SE mm x mm PACKAGE BSC. BSC. BSC. Ordering Information: Changed sample OPN RYSU 05/19/2008 Added Commercial temperature range Changed configuration in “Device Number/description” Modified “Recommended Combination” table removed TSOP package option Erase And Program Performance: Chip Program Time - removed comment Common Flash Memory Interface: Removed section see publication S29GL-P_00 for details Global: RYSU 02/23/2010 Updated available model options. Corrected Chip Program Time. 4950184 RYSU 10/06/2015 Updated to Cypress template 5177489 RYSU 03/16/2016 Updated General Description and Distinctive Characteristics. Page 10 of 11 S70GL02GP Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Microcontrollers Automotive Clocks & Buffers Interface Lighting & Power Control Memory PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/arm cypress.com/automotive cypress.com/clocks cypress.com/interface cypress.com/powerpsoc cypress.com/memory cypress.com/psoc cypress.com/touch cypress.com/usb cypress.com/wireless Solutions cypress.com/psoc 1 \| PSoC 3 \| PSoC 4 \| PSoC 5LP Cypress Developer Community \| Forums \| Blogs \| Video \| Training Technical Support cypress.com/support Cypress Semiconductor Corporation This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC "Cypress" . This document, including any software or firmware included or referenced in this document "Software" , is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you under its copyright rights in the Software, a personal, non-exclusive, nontransferable license without the right to sublicense a for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and b to distribute the Software in binary code form externally to end users either directly or indirectly through resellers and distributors , solely for use on Cypress hardware product units. Cypress also grants you a personal, non-exclusive, nontransferable, license without the right to sublicense under those claims of Cypress's patents that are infringed by the Software as provided by Cypress, unmodified to make, use, distribute, and import the Software solely to the minimum extent that is necessary for you to exercise your rights under the copyright license granted in the previous sentence. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited. CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems including resuscitation equipment and surgical implants , pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage "Unintended Uses" . A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and Company shall and hereby does release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. Company shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. Page 11 of 11

PDF Datasheet Preview

S70GL02GP
2 Gbit, 3V Page Mode S70GL-P Flash

The Cypress S70GL02GP 2 Gbit Mirrorbit Flash device is fabricated on 90-nm process technology. This device offers a fast page access time of 25 ns with a corresponding random access time of 110 ns. It features a Write Buffer that allows a maximum of 32 words/64 bytes to be programmed in one operation, resulting in faster effective programming time than standard single byte/word programming algorithms. This makes the device an ideal product for today’s embedded applications that require higher density, better performance and lower power consumption.

This document contains information for the S70GL02GP device, which is a dual die stack of two S29GL01GP die. For detailed specifications, refer to the discrete die datasheet provided in Table

Table Affected Documents/Related Documents

Title S29GL01GP, S29GL512P, S29GL256P, S29GL128P 1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit Process Technology

Publication Number 002-00886

Distinctive Characteristics

Two 1024 Mbit S29GL01GP in a single 64-ball FortifiedBGA package see S29GL01P datasheet for full specifications

Single 3V read/program/erase 3.0V - 3.6V 90 nm MirrorBit process technology 8-word/16-byte page read buffer 32-word/64-byte write buffer reduces overall programming
time for multiple-word writes Secured Silicon Sector region
128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number

Can be programmed and locked at the factory or by the customer

Uniform 64Kword/128KByte Sector Architecture S70GL02GP two thousand forty-eight sectors
100,000 erase cycles per sector typical 20-year data retention typical Offered Packages
64-ball Fortified BGA

Suspend and Resume commands for Program and Erase operations

Write operation status bits indicate program and erase operation completion

Unlock Bypass Program command to reduce programming time

Support for Common Flash Interface CFI

Persistent and Password methods of Advanced Sector Protection

WP#/ACC input Accelerates programming time when VACC is applied for greater throughput during system production Protects first or last sector of each die, regardless of sector protection settings

Hardware reset input RESET# resets device

Ready/Busy# output RY/BY# detects program or erase cycle completion
• San Jose, CA 95134-1709
• 408-943-2600

Performance Characteristics

Max. Read Access Times ns Note 1

Parameter

Random Access Time tACC

Page Access Time tPACC

CE# Access Time tCE

OE# Access Time tOE
Notes Access times are dependent on VCC and VIO operating ranges. See Ordering Information on page 4 for further details. Contact a sales representative for availability.

Random Access Read 8-Word Page Read Program/Erase Standby

Current Consumption typical values
30 mA 1 mA 50 mA 2 µA

Program & Erase Times typical values Single Word Programming Effective Write Buffer Programming VCC Per Word Effective Write Buffer Programming VACC Per Word Sector Erase Time 64 Kword Sector
60 µs 15 µs 15 µs

S70GL02GP

Page 2 of 11

S70GL02GP

Contents
Ordering Information 4 Recommended 4

Input/Output Description and Logic Symbol............. 5 Special Handling Instructions for BGA Package............ 6 ball Fortified Ball Grid Array, 13 11 mm 7

Page 3 of 11

S70GL02GP
Ordering Information
The ordering part number is formed by a valid combination of the following:

S70GL02GP

PACKING TYPE 0 = Tray standard see Note 3 2 = 7” Tape and Reel 3 = 13” Tape and Reel

MODEL NUMBER VIO range, protection when WP# =VIL R1 = VIO = VCC = to 3.6V, highest address sector protected R2 = VIO = VCC = to 3.6V, lowest address sector protected

TEMPERATURE RANGE I = Industrial °C to +85 °C = Commercial 0 °C to +85 °C

PACKAGE MATERIALS SET A = Pb Note 1 F = Pb-free

PACKAGE TYPE F = Fortified Ball Grid Array, mm pitch package

SPEED OPTION 11 = 110 ns

DEVICE NUMBER/DESCRIPTION S70GL02GP 3.0V-only, 2048 Megabit 128 M x 16-Bit/256 M x 8-Bit Page-Mode Flash Memory Manufactured on 90 nm MirrorBit process technology

Recommended Combinations

Recommended Combinations table below list various configurations planned to be available in volume. The table below will be updated as new combinations are released. Check with your local sales representative to confirm availability of specific configuration not listed or to check on newly released combinations.

Base OPN

Speed ns

S29GL-P Recommended Combinations Note 1

Package and Temperature

Model Number Packing Type

S70GL02GP

FFC, FAC Note 2

R1, R2
0, 2, 3 Note 3

Notes Contact a local sales representative for availability.
BGA package marking omits leading “S29” and packing type designator from ordering part number.

Packing Type “0” is standard option.
Ordering Part Number x = Packing Type

S70GL02GP11FFCR1x S70GL02GP11FFCR2x S70GL02GP11FACR1x S70GL02GP11FACR2x

Page 4 of 11

S70GL02GP

Input/Output Description and Logic Symbol

Table 1 identifies the input and output package connections provided on the device.

Table Input/Output Description

DQ15/A-1

CE# OE# WE# VCC VIO VSS RY/BY#

BYTE# RESET#

WP#/ACC

Type Input I/O

Input Supply Output

Input

Input

No Connect

Description Address lines for GL02GP Data input/output. DQ15 Data input/output in word mode. A-1 LSB address input in byte mode. Chip Enable. Output Enable. Write Enable. Device Power Supply. Versatile IO Input. Ground. Ready/Busy. Indicates whether an Embedded Algorithm is in progress or complete. At VIL, the device is actively erasing or programming. At High Z, the device is in ready. Selects data bus width. At VIL, the device is in byte configuration and data I/O pins DQ0-DQ7 are active. At VIH, the device is in word configuration and data I/O pins DQ0-DQ15 are active. Hardware Reset. Low = device resets and returns to reading array data. Write Protect/Acceleration Input. At VIL, disables program and erase functions in the outermost sectors. At VHH, accelerates programming automatically places device in unlock bypass mode. Should be at VIH for all other conditions. Not connected internally.

Page 5 of 11

S70GL02GP

Special Handling Instructions for BGA Package

Special handling is required for Flash Memory products in BGA packages. Flash memory devices in BGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time.

Figure 64-ball Fortified Ball Grid Array
64-ball Fortified BGA Top View, Balls Facing Down

A16 BYTE# DQ15/A-1 VSS

DQ7 DQ14 DQ13 DQ6

WE# RESET# A21

DQ12

RY/BY# WP#/ACC A18

DQ2 DQ10 DQ11 DQ3

Page 6 of 11

S70GL02GP
ball Fortified Ball Grid Array, 13 11 mm

Figure Fortified Ball Grid Array FBGA , 13 x 11 mm

PACKAGE JEDEC

LSE 064 N/A

SYMBOL A A1 A2 D E D1 E1 MD ME n Øb eE eD

SD / SE
mm x mm PACKAGE

BSC.

BSC.

BSC.
Ordering Information:

Changed sample OPN

RYSU
05/19/2008

Added Commercial temperature range Changed configuration in “Device Number/description”

Modified “Recommended Combination” table
removed TSOP package option

Erase And Program Performance:

Chip Program Time - removed comment

Common Flash Memory Interface:

Removed section see publication S29GL-P_00 for details

Global:

RYSU 02/23/2010 Updated available model options.

Corrected Chip Program Time.
4950184 RYSU 10/06/2015 Updated to Cypress template
5177489 RYSU 03/16/2016 Updated General Description and Distinctive Characteristics.

Page 10 of 11

S70GL02GP

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations.

Products Microcontrollers Automotive Clocks & Buffers Interface Lighting & Power Control Memory PSoC Touch Sensing USB Controllers Wireless/RF
cypress.com/arm cypress.com/automotive
cypress.com/clocks cypress.com/interface cypress.com/powerpsoc cypress.com/memory
cypress.com/psoc cypress.com/touch
cypress.com/usb cypress.com/wireless

Solutions cypress.com/psoc 1 | PSoC 3 | PSoC 4 | PSoC 5LP

Cypress Developer Community | Forums | Blogs | Video | Training

Technical Support cypress.com/support

Cypress Semiconductor Corporation This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC "Cypress" . This document, including any software or firmware included or referenced in this document "Software" , is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you under its copyright rights in the Software, a personal, non-exclusive, nontransferable license without the right to sublicense a for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and b to distribute the Software in binary code form externally to end users either directly or indirectly through resellers and distributors , solely for use on Cypress hardware product units. Cypress also grants you a personal, non-exclusive, nontransferable, license without the right to sublicense under those claims of Cypress's patents that are infringed by the Software as provided by Cypress, unmodified to make, use, distribute, and import the Software solely to the minimum extent that is necessary for you to exercise your rights under the copyright license granted in the previous sentence. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited.

CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems including resuscitation equipment and surgical implants , pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage "Unintended Uses" . A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and Company shall and hereby does release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. Company shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.

Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.

Page 11 of 11

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived S70GL02GP11FFIR22 Datasheet file may be downloaded here without warranties.

Datasheet ID: S70GL02GP11FFIR22 508321