BCM1125HA2K600

BCM1125HA2K600 Datasheet

BCM1125H

Part	Datasheet
BCM1125HA2K600	BCM1125HA2K600 (pdf)

Related Parts	Information
BCM1125HB0K400G	BCM1125HB0K400G
BCM1125HB0K800G	BCM1125HB0K800G
BCM1125HA4K600G	BCM1125HA4K600G
BCM1125HB0K600G	BCM1125HB0K600G
BCM1125HA4K800G	BCM1125HA4K800G
BCM1125HA4K600	BCM1125HA4K600

PDF Datasheet Preview
BCM1125H BCM1125H HIGH-PERFORMANCE MIPS PROCESSOR SUMMARY OF BENEFITS • Highly integrated single core processor running at 400 MHz - 800 MHz • SB-1 MIPS64 CPU • Quad-issue in order pipeline dual execute, dual memory pipes • Enhanced skew pipeline enables zero load-to-use penalty • 32-KB instruction cache, 32-KB data cache • Advanced branch predictors • Fast, on-chip memory-coherent bus ZBbus • Connects the CPU, L2 cache, memory controller and I/O bridges • Runs at half the CPU core clock 256 bits wide • On-chip L2 cache • 256 KB, shared by CPU and I/O bridges • Four-way associative, ECC protected • Ways can be removed to provide fast on-chip RAM • DDR memory controller • One channel with a 64-bit data bus plus ECC • Runs up to 200 MHz clock rate, 400 Mbps data rate • Support for DDR SDRAM, SGRAM, and FCRAM • High-speed packet interfaces • Two 10/100/1000 Ethernet MACs compliant • Option to configure MACs into packet FIFOs to enable OC-48 data rates • PCI interface • 32-bit, 33/66 MHz PCI • Host bridge or target device • HyperTransport I/O interface • Complies with HyperTransport standard for high-speed I/O fabric • 600-MHz clock rate, Gbps data rate • Peak bandwidth of Gbps on 8-bit link • Supports double-ended fabrics linking two BCM1125Hs or BCM1125H to BCM1250, BCM1280, or BCM1480 • Integrated system I/O • Generic I/O for direct connect to boot ROM, FLASH, fast peripherals/ ASICs • SMBus serial configuration interface • PCMCIA control interface • Two serial interfaces • Extensive, on-chip debug features • 4W 400 MHz • Software-compatible with BCM1250, BCM1255, BCM1280, BCM1455, and BCM1480 Support for leading operating systems including and Teja NP OS • Multiple evaluation board platforms available with tools, firmware and software drivers • Industry-leading performance • DMIPS/MHz • Processing speed of up to Mpps* • 128-Gbps on-chip bus bandwidth, 25-Gbps memory bandwidth, 30- Gbps total I/O bandwidth • Low power dissipation starting at less than 4W 400 MHz • High functional integration • Programming ease and flexibility based on MIPS64 ISA • Scalable system architecture • Broad tools and system software support • Software-compatible with BCM1250, BCM1255, BCM1280, BCM1455, and BCM1480 *Based on internal Broadcom benchmark, using BCM112x for standard IPv4 L3 look-up/switching.

PDF Datasheet Preview

BCM1125H

BCM1125H HIGH-PERFORMANCE MIPS PROCESSOR

SUMMARY OF BENEFITS
• Highly integrated single core processor running at 400 MHz - 800 MHz
• SB-1 MIPS64 CPU
• Quad-issue in order pipeline dual execute, dual memory pipes
• Enhanced skew pipeline enables zero load-to-use penalty
• 32-KB instruction cache, 32-KB data cache
• Advanced branch predictors
• Fast, on-chip memory-coherent bus ZBbus
• Connects the CPU, L2 cache, memory controller and I/O bridges
• Runs at half the CPU core clock 256 bits wide
• On-chip L2 cache
• 256 KB, shared by CPU and I/O bridges
• Four-way associative, ECC protected
• Ways can be removed to provide fast on-chip RAM
• DDR memory controller
• One channel with a 64-bit data bus plus ECC
• Runs up to 200 MHz clock rate, 400 Mbps data rate
• Support for DDR SDRAM, SGRAM, and FCRAM
• High-speed packet interfaces
• Two 10/100/1000 Ethernet MACs compliant
• Option to configure MACs into packet FIFOs to enable OC-48 data
rates
• PCI interface
• 32-bit, 33/66 MHz PCI
• Host bridge or target device
• HyperTransport I/O interface
• Complies with HyperTransport standard for high-speed I/O fabric
• 600-MHz clock rate, Gbps data rate
• Peak bandwidth of Gbps on 8-bit link
• Supports double-ended fabrics linking two BCM1125Hs or

BCM1125H to BCM1250, BCM1280, or BCM1480
• Integrated system I/O
• Generic I/O for direct connect to boot ROM, FLASH, fast peripherals/

ASICs
• SMBus serial configuration interface
• PCMCIA control interface
• Two serial interfaces
• Extensive, on-chip debug features
• 4W 400 MHz
• Software-compatible with BCM1250, BCM1255, BCM1280,

BCM1455, and BCM1480

Support for leading operating systems including and Teja NP OS
• Multiple evaluation board platforms available with tools, firmware and
software drivers
• Industry-leading performance
• DMIPS/MHz
• Processing speed of up to Mpps*
• 128-Gbps on-chip bus bandwidth, 25-Gbps memory bandwidth, 30-

Gbps total I/O bandwidth
• Low power dissipation starting at less than 4W 400 MHz
• High functional integration
• Programming ease and flexibility based on MIPS64 ISA
• Scalable system architecture
• Broad tools and system software support
• Software-compatible with BCM1250, BCM1255, BCM1280,

BCM1455, and BCM1480
*Based on internal Broadcom benchmark, using BCM112x for standard IPv4 L3 look-up/switching.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived BCM1125HA2K600 Datasheet file may be downloaded here without warranties.

Datasheet ID: BCM1125HA2K600 520200