CYWB0224ABMX-FDXIT

CYWB0224ABMX-FDXIT Datasheet

PRELIMINARY CYWB0224ABS, CYWB0224ABM CONFIDENTIAL CYWB0226ABS, CYWB0226ABM

Part	Datasheet
CYWB0224ABMX-FDXIT	CYWB0224ABMX-FDXIT (pdf)

Related Parts	Information
CYWB0226ABMX-FDXIT	CYWB0226ABMX-FDXIT
CYWB0224ABM-BVXI	CYWB0224ABM-BVXI
CYWB0224ABM-BVXIT	CYWB0224ABM-BVXIT
CYWB0226ABM-BVXI	CYWB0226ABM-BVXI
CYWB0226ABM-BVXIT	CYWB0226ABM-BVXIT

PDF Datasheet Preview
PRELIMINARY CYWB0224ABS, CYWB0224ABM CONFIDENTIAL CYWB0226ABS, CYWB0226ABM West Bridge Astoria USB and Mass Storage Peripheral Controller • N-Xpress NAND controller technology • Interleave up to 16 NANDs with 8 chip enables CE# for x8 or x16 SLC CYWB0224ABS or MLC CYWB0224ABM NAND Flash devices • 4-bit error correction coding • Bad block management • Static wear leveling • Multimedia device support • Up to 2 SD, SDIO, MMC, MMC+, and CE-ATA devices • SLIM architecture, allowing simultaneous and independent data paths between the processor and USB, and between the USB and mass storage • High speed USB at 480 Mbps • USB compliant • Integrated USB switch • Integrated USB transceiver, smart serial interface en- gine • 16 programmable endpoints • Flexible processor interface, which supports: • Multiplexing and nonmultiplexing address and data interface • SRAM interface • Pseudo CRAM interface Antioch interface • Pseudo NAND Flash interface • SPI slave mode interface • DMA slave support • Ultra low power, 1.8V core operation • Low power modes • Small footprint, 6x6mm VFBGA • Supports I2C boot and processor boot • Selectable clock input frequencies • MHz, 24 MHz, 26 MHz, and 48 MHz • Cellular Phones • Portable Media Players • Personal Digital Assistants • Portable Navigation Devices • Digital Cameras • POS Terminals • Portable Video Recorders • Data Cards and Wireless Dongles Block Diagram West BridgeTM AstoriaTM Control Registers Access Control Flexible Processor Interface High-Speed USB XCVR SLIMTM SD/SDIO/ Cypress MMC+/ CE- N-XpressTM ATA Block Engine Configurable Storage Interface Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback PRELIMINARY CONFIDENTIAL CYWB0224ABS, CYWB0224ABM CYWB0226ABS, CYWB0226ABM Functional Overview The SLIM Architecture The Simultaneous Link to Independent Multimedia SLIM architecture allows three different interfaces P-port, S-port and U-port to connect to one another independently. With this architecture, connecting a device using Astoria to a PC through USB does not disturb any of the functions of the device. The device can still access mass storage at the same time the PC is synchronizing with the main processor. The SLIM architecture enables new usage models in which a PC can access a mass storage device independent of the main processor, or enumerate access to both the mass storage and the main processor at the same time. In a handset, this typically enables using the phone as a thumb drive, downloading media files to the phone while still having full functionality available on the phone, or using the same phone as a modem to connect the PC to the web. 8051 Microprocessor The 8051 microprocessor embedded in Astoria does basic transaction management for all the transactions between P-Port, S-Port, and U-Port. The 8051 does not reside in the data path it manages the path. The data path is optimized for performance. The 8051 executes firmware that supports NAND, SD, SDIO, MMC+, and CE-ATA devices at the S-Port. For the NAND device, the 8051 firmware follows the smart media algorithm to support: Ordering Information Ordering Code CYWB0224ABS-BVXI CYWB0224ABM-BVXI CYWB0226ABS-BVXI Package Type 100 VFBGA Pb-Free 100 VFBGA Pb-Free 100 VFBGA Pb-Free CYWB0226ABM-BVXI 100 VFBGA Pb-Free NAND Flash Support Support SLC NAND Flash only Support SLC and MLC NAND Flash Support SLC NAND Flash and USB switch Support SLC and MLC NAND Flash and USB switch Available Clock Input Frequencies MHz 24, 26, 48 24, 26, 48 24, 26, 48 24, 26, 48 Page 6 of 7 [+] Feedback Package Diagram PRELIMINARY CONFIDENTIAL CYWB0224ABS, CYWB0224ABM CYWB0226ABS, CYWB0226ABM Figure 100 VFBGA 6 x 6 x MM BZ100A TOP VIEW A1 CORNER 1 2 3 4 5 6 7 8 9 10 A B C D E F G H J K BOTTOM VIEW A1 CORNER M C A B Ø0.30±0.05 100X 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K B 0.15 4X C REF. REF. SEATING PLANE C REFERENCE JEDEC MO-195C PKG. WEIGHT TBD NEW PKG. 51-85209-*B Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. West Bridge, Astoria, Antioch, and SLIM are trademarks of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders. [+] Feedback

PDF Datasheet Preview

PRELIMINARY CYWB0224ABS, CYWB0224ABM CONFIDENTIAL CYWB0226ABS, CYWB0226ABM

West Bridge Astoria USB and Mass Storage Peripheral Controller
• N-Xpress NAND controller technology
• Interleave up to 16 NANDs with 8 chip enables CE# for x8 or x16 SLC CYWB0224ABS or MLC CYWB0224ABM NAND Flash devices
• 4-bit error correction coding
• Bad block management
• Static wear leveling
• Multimedia device support
• Up to 2 SD, SDIO, MMC, MMC+, and CE-ATA devices
• SLIM architecture, allowing simultaneous and
independent data paths between the processor and USB, and between the USB and mass storage
• High speed USB at 480 Mbps
• USB compliant
• Integrated USB switch
• Integrated USB transceiver, smart serial interface en-
gine
• 16 programmable endpoints
• Flexible processor interface, which supports:
• Multiplexing and nonmultiplexing address and data interface
• SRAM interface
• Pseudo CRAM interface Antioch interface
• Pseudo NAND Flash interface
• SPI slave mode interface
• DMA slave support
• Ultra low power, 1.8V core operation
• Low power modes
• Small footprint, 6x6mm VFBGA
• Supports I2C boot and processor boot
• Selectable clock input frequencies
• MHz, 24 MHz, 26 MHz, and 48 MHz
• Cellular Phones
• Portable Media Players
• Personal Digital Assistants
• Portable Navigation Devices
• Digital Cameras
• POS Terminals
• Portable Video Recorders
• Data Cards and Wireless Dongles

Block Diagram

West BridgeTM AstoriaTM

Control Registers

Access Control

Flexible Processor Interface

High-Speed USB XCVR

SLIMTM

SD/SDIO/ Cypress MMC+/ CE- N-XpressTM ATA Block Engine

Configurable Storage Interface

Cypress Semiconductor Corporation
• 198 Champion Court
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

PRELIMINARY CONFIDENTIAL

CYWB0224ABS, CYWB0224ABM CYWB0226ABS, CYWB0226ABM

Functional Overview

The SLIM Architecture

The Simultaneous Link to Independent Multimedia SLIM architecture allows three different interfaces P-port, S-port and U-port to connect to one another independently.

With this architecture, connecting a device using Astoria to a PC through USB does not disturb any of the functions of the device. The device can still access mass storage at the same time the PC is synchronizing with the main processor.

The SLIM architecture enables new usage models in which a PC can access a mass storage device independent of the main processor, or enumerate access to both the mass storage and the main processor at the same time.

In a handset, this typically enables using the phone as a thumb drive, downloading media files to the phone while still having full functionality available on the phone, or using the same phone as a modem to connect the PC to the web.
8051 Microprocessor

The 8051 microprocessor embedded in Astoria does basic transaction management for all the transactions between P-Port, S-Port, and U-Port. The 8051 does not reside in the data path it manages the path. The data path is optimized for performance. The 8051 executes firmware that supports NAND, SD, SDIO, MMC+, and CE-ATA devices at the S-Port. For the NAND device, the 8051 firmware follows the smart media algorithm to support:
Ordering Information
Ordering Code

CYWB0224ABS-BVXI CYWB0224ABM-BVXI CYWB0226ABS-BVXI

Package Type
100 VFBGA Pb-Free 100 VFBGA Pb-Free 100 VFBGA Pb-Free

CYWB0226ABM-BVXI 100 VFBGA Pb-Free

NAND Flash Support

Support SLC NAND Flash only Support SLC and MLC NAND Flash Support SLC NAND Flash and USB switch Support SLC and MLC NAND Flash and USB switch

Available Clock Input Frequencies MHz 24, 26, 48 24, 26, 48 24, 26, 48
24, 26, 48

Page 6 of 7 [+] Feedback

Package Diagram

PRELIMINARY CONFIDENTIAL

CYWB0224ABS, CYWB0224ABM CYWB0226ABS, CYWB0226ABM

Figure 100 VFBGA 6 x 6 x MM BZ100A

TOP VIEW

A1 CORNER
1 2 3 4 5 6 7 8 9 10

A B C D E F G H J K

BOTTOM VIEW

A1 CORNER

M C A B
Ø0.30±0.05 100X
10 9 8 7 6 5 4 3 2 1

A B C D E F G H J K

B 0.15 4X

C REF.

REF.

SEATING PLANE C

REFERENCE JEDEC MO-195C PKG. WEIGHT TBD NEW PKG.
51-85209-*B

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement.

West Bridge, Astoria, Antioch, and SLIM are trademarks of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders.
[+] Feedback

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Datasheet ID: CYWB0224ABMX-FDXIT 508261