CYW20732A0
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CYW20732A0KML2G |
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CYW20732A0 Single-Chip Bluetooth Low-Energy Only SoC The Cypress CYW20732A0 is a Bluetooth Low-Energy BLE -only SoC. The CYW20732A0 radio has been designed to provide low power, low cost, and robust communications for applications operating in the globally available GHz unlicensed Industrial, Scientific, and Medical ISM band. The single-chip BLE SoC is a monolithic component implemented in a standard digital CMOS process and requires minimal external components to make a fully compliant Bluetooth device. The CYW20732A0 is available in a 32-pin, 5 mm x 5 mm 32-QFN package. Cypress Part Numbering Scheme Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion, there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides Cypress ordering part number that matches an existing IoT part number. Table Mapping Table for Part Number between Broadcom and Cypress Broadcom Part Number BCM20732 BCM20732A0KML2G Cypress Part Number CYW20732 CYW20732A0KML2G • Bluetooth Low-Energy BLE -compliant • Infrared modulator • IR learning • Supports Adaptive Frequency Hopping • Excellent receiver sensitivity • 10-bit auxiliary ADC with nine analog channels • On-chip support for serial peripheral interface master and slave modes • Cypress CypressSerial Control BSC interface compatible with NXP I2C slaves • Programmable output power control • Integrated ARM Cortex-M3 based microprocessor core • On-chip power-on reset POR • Support for EEPROM and serial flash interfaces • Integrated Low DropOut LDO regulator • On-chip, software controlled power management unit • 32-pin 32-QFN 5 mm x 5 mm package • RoHS compliant The following profiles are supported in ROM: • Battery status • Blood pressure monitor • Find me • Heart rate monitor • Proximity • Thermometer • Weight scale • Time Additional profiles that can be supported from RAM include: • Blood glucose monitor • Temperature alarm • Location Full qualification and use of these profiles may require firmware updates from Cypress. Some profiles are under development/ approval at Bluetooth SIG and conformity with the final approved version is pending. Contact your supplier for updates and the latest list of profiles. • San Jose, CA 95134-1709 • 408-943-2600 CYW20732A0 Figure Functional Block Diagram Muxed on GPIO UART_TXD Tx RTS_N Rx CTS_N UART_RXD SDA/ SCL/ MOSI SCK MISO 1.2V VDD_CORE 1.2V Processing Unit ARM -CM3 Test UART Periph UART 1.2V VDD_CORE Domain 320K ROM 60K BSC/SPI Master Interface BSC is I2C VSS, VDDO, VDDC 28 ADC Inputs CT ADC 1.2V POR 1.2V LDO 32 kHz LPCLK hclk 24 MHz to 1 MHz System Bus Peripheral Interface Block Volt. Trans I/O Ring Control Registers GHz Radio RF Control and Data Mechanical Information 29 Ordering Information 31 A. Appendix Acronyms and Abbreviations 32 Document History 33 Page 3 of 35 CYW20732A0 Functional Description Bluetooth Baseband Core The Bluetooth Baseband Core BBC implements all of the time-critical functions required for high performance Bluetooth operation. The BBC manages the buffering, segmentation, and data routing for all connections. It also buffers data that passes through it, handles data flow control, schedules ACL TX/RX transactions, monitors Bluetooth slot usage, optimally segments and packages data into baseband packets, manages connection status indicators, and composes and decodes HCI packets. In addition to these functions, it independently handles HCI event types and HCI command types. The following transmit and receive functions are also implemented in the BBC hardware to increase TX/RX data reliability and security before sending over the air • Receive Functions symbol timing recovery, data deframing, forward error correction FEC , header error control HEC , cyclic redundancy check CRC , data decryption, and data dewhitening. • Transmit Functions data framing, FEC generation, HEC generation, CRC generation, link key generation, data encryption, and data whitening. Frequency Hopping Generator The frequency hopping sequence generator selects the correct hopping channel number depending on the link controller state, Bluetooth clock, and device address. E0 Encryption The encryption key and the encryption engine are implemented using dedicated hardware to reduce software complexity and provide minimal processor intervention. Link Control Layer The link control layer is part of the Bluetooth link control functions that are implemented in dedicated logic in the link control unit LCU . This layer consists of the Command Controller, which takes software commands, and other controllers that are activated or configured by the Command Controller to perform the link control tasks. Each task performs a different Bluetooth link controller state. STANDBY and CONNECTION are the two major states. In addition, there are five substates page, page scan, inquiry, and inquiry scan. Adaptive Frequency Hopping The CYW20732 gathers link quality statistics on a channel-by-channel basis to facilitate channel assessment and channel map selection. The link quality is determined by using both RF and baseband signal processing to provide a more accurate frequency hop map. Bluetooth Low Energy Profiles The CYW20732 supports Bluetooth low-energy, including the following profiles that are supported1 in ROM • Battery status • Blood pressure monitor • Find me • Heart rate monitor • Proximity • Thermometer • Weight scale • Time The following additional profiles can be supported1 from RAM • Blood glucose monitor • Temperature alarm • Location • Custom profile Full qualification and use of these profiles may require firmware updates from Cypress. Some of these profiles are under development/approval at the Bluetooth SIG and conformity with the final approved version is pending. Contact your supplier for updates and the latest list of profiles. Page 4 of 35 CYW20732A0 Test Mode Support The CYW20732 fully supports Bluetooth Test mode, as described in the Bluetooth low energy specification. Infrared Modulator The CYW20732 includes hardware support for infrared TX. The hardware can transmit both modulated and un-modulated waveforms. For modulated waveforms, hardware inserts the desired carrier frequency into all IR transmissions. IR TX can be sourced from firmware-supplied descriptors, a programmable bit, or the peripheral UART transmitter. If descriptors are used, they include IR on/off state and the duration between 1 and 32,767 µsec. The CYW20732 IR TX firmware driver inserts this information in a hardware FIFO and makes sure that all descriptors are played out without a glitch due to under run see Figure 2 on page Figure Infrared TX Infrared Learning The CYW20732 includes hardware support for infrared learning. The hardware can detect both modulated and unmodulated signals. For modulated signals, the CYW20732 can detect carrier frequencies between 10 500 kHz and the duration that the signal is present or absent. The CYW20732 firmware driver supports further analysis and compression of learned signal. The learned signal can then be played back through the CYW20732 IR TX subsystem see Figure Figure Infrared RX Page 5 of 35 CYW20732A0 ADC Port The CYW20732 contains a 16-bit ADC effective number of bits is Additionally: • There are nine analog input channels in the 32-pin package • The following GPIOs can be used as ADC inputs P0 P1 P8/P33 select only one P11 P12 P13/P28 select only one P14/P38 select only one P15 P32 • The conversion time is 10 us. • There is a built-in reference with supply- or bandgap-based reference modes. • The maximum conversion rate is 187 kHz. • There is a rail-to-rail input swing. The ADC consists of an analog ADC core that performs the actual analog-to-digital conversion and digital hardware that processes the output of the ADC core into valid ADC output samples. Directed by the firmware, the digital hardware also controls the input multiplexers that select the ADC input signal Vinp and the ADC reference signals Vref. The ADC input range is selectable by firmware control: • When an input range of is used, the input impedance is 3 • When an input range of is used, the input impedance is • When an input range of is used, the input impedance is 680 ADC modes are defined in Table Table ADC Modes Mode ENOB Typical Maximum Sampling Rate kHz 187 Latencya us 171 85 21 11 5 a.Settling time after switching channels. Serial Peripheral Interface The CYW20732 has two independent SPI interfaces. One is a master-only interface and the other can be either a master or a slave. Each interface has a 16-byte transmit buffer and a 16-byte receive buffer. To support more flexibility for user applications, the CYW20732 has optional I/O ports that can be configured individually and separately for each functional pin as shown in Table 3, Table 4, and Table The CYW20732 acts as a SPI master device that supports 1.8V or 3.3V SPI slaves. The CYW20732 can also act as an SPI slave device that supports a 1.8V or 3.3V SPI master. Page 6 of 35 CYW20732A0 Table CYW20732 First SPI Set Master Mode Ordering Information Table Ordering Information Part Number CYW20732A0KML2G 32-pin QFN Package CYW20732A0 Ambient Operating Temperature to +85°C Page 31 of 35 CYW20732A0 A. Appendix Acronyms and Abbreviations The following list of acronyms and abbreviations may appear in this document. Term ADC AFH AHB APB APU ARM7TDMI-S CSC BTC COEX DFU DMA EBI HCI HV IDC IF IRQ JTAG LCU LDO LHL LPO LV MIA PCM PLL PMU POR PWM QD RAM RF ROM RX/TX SPI SW UART UPI WD Description analog-to-digital converter adaptive frequency hopping advanced high-performance bus advanced peripheral bus audio processing unit Acorn RISC Machine 7 Thumb instruction, Debugger, Multiplier, Ice, Synthesizable Cypress Serial Control Bluetooth controller coexistence device firmware update direct memory access external bus interface Host Control Interface high voltage initial digital calibration intermediate frequency interrupt request Joint Test Action Group link control unit low drop-out lean high land low power oscillator LogicVision multiple interface agent pulse code modulation phase locked loop power management unit power-on reset pulse width modulation quadrature decoder random access memory radio frequency read-only memory receive, transmit serial peripheral interface software universal asynchronous receiver/transmitter µ-processor interface watchdog Page 32 of 35 CYW20732A0 Document History Document Title CYW20732A0 Single-Chip Bluetooth Low-Energy Only SoC Document Number 002-14837 ECN Orig. of Change Submission Date Description of Change 6/27/2011 20732-DS100-R Initial release 20732-DS101-R: 2/24/2012 Updated • Document title changed. • “Bluetooth Low Energy Features” on page • Table 8 “GPIO Pin Descriptions,” on page • Table 15 “Receiver RF Specifications,” on page • Table 16 “Transmitter RF Specifications,” on page • “SPI Timing” on page 20732-DS102-R: 9/17/2012 Updated • ‘Preliminary Data Sheet’ to ‘Data Sheet’. • ‘HIDOFF mode’ to ‘HIDOFF Deep Sleep mode’. 20732-DS103-R: 7/10/2013 Updated • “Bluetooth Low Energy Features” on page • “Microprocessor Unit” on page • Table 9 “Maximum Electrical Rating,” on page 20 • Table 21 “Ordering Information,” on page 20732-DS104-R: 9/17/2013 Updated • Table 14 “Current Consumption,” on page 22 RX/Tx maximum current values. 20732-DS105-R: 10/03/2013 Updated: • Table 14 “Current Consumption,” on page 20732-DS106-R: 12/12/2013 Updated: • Table 16 “Transmitter RF Specifications,” on page 24 3/26/2014 20732-DS107-R Updated • Figure 14 “32-Pin 5x5 mm QFN Package,” on page 30 Added • Table 20 “32-pin 5x5 mm QFN Package Dimensions Footprint on page 30 20732-DS108-R: 06/05/2014 Updated: • “UART Interface” on page 20732-DS109-R: 11/24/2014 Updated: • Table 5 “Reference Crystal Electrical Specifications,” on page10 20732-DS110-R: 04/21/2015 Updated: • Table15:“Receiver RF Specifications,” on page23 Page 33 of 35 Document Title CYW20732A0 Single-Chip Bluetooth Low-Energy Only SoC Document Number 002-14837 20732-DS111-R: 02/16/2016 Added: • “ESD Test Models” on page 27 5448744 UTSV 11/02/2016 Migrated to Cypress template. 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