CYD02S36V-167BBC

CYD02S36V-167BBC Datasheet


CYD01S36V CYD02S36V/36VA/CYD04S36V

Part Datasheet
CYD02S36V-167BBC CYD02S36V-167BBC CYD02S36V-167BBC (pdf)
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CYD01S36V CYD02S36V/36VA/CYD04S36V

CYD09S36V/CYD18S36V

FLEx36 3.3V 32K/64K/128K/256K/512 x 36 Synchronous Dual-Port RAM

Functional Description
• True dual-ported memory cells that enable simultaneous access of the same memory location
• Synchronous pipelined operation
• Family of 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit and 18-Mbit devices
• Pipelined output mode allows fast operation
• micron CMOS for optimum speed and power
• High speed clock to data access
• 3.3V low power

Active as low as 225 mA typ. Standby as low as 55 mA typ.
• Mailbox function for message passing
• Global master reset
• Separate byte enables on both ports
• Commercial and industrial temperature ranges
• IEEE 1149.1-compatible JTAG boundary scan
• 256 Ball FBGA 1-mm pitch
• Counter wrap around control Internal mask register controls counter wrap-around Counter-interrupt flags to indicate wrap-around Memory block retransmit operation
• Counter readback on address lines
• Mask register readback on address lines

The FLEx36 family includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit, and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high speed, low power 3.3V CMOS. Two ports are provided, permitting independent, simultaneous access to any location in memory. A particular port can write to a certain location while another port is reading that location. The result of writing to the same location by more than one port at the same time is undefined. Registers on control, address, and data lines allow for minimal setup and hold time.

During a Read operation, data is registered for decreased cycle time. Each port contains a burst counter on the input address register. After externally loading the counter with the initial address, the counter increments the address internally more details to follow . The internal Write pulse width is independent of the duration of the R/W input signal. The internal Write pulse is self-timed to allow the shortest possible cycle times.

A HIGH on CE0 or LOW on CE1 for one clock cycle powers down the internal circuitry to reduce the static power consumption. One cycle with chip enables asserted is required to reactivate the outputs.

Additional features include readback of burst-counter internal address value on address lines, counter-mask registers to control the counter wrap-around, counter interrupt CNTINT flags, readback of mask register value on address lines, retransmit functionality, interrupt flags for message passing, JTAG for boundary scan, and asynchronous Master Reset MRST .

The CYD18S36V devices in this family has limited features. Please see Address Counter and Mask Register Operations[19] on page 5 for details.
• Dual Chip Enables on both ports for easy depth expansion
• Seamless migration to next-generation dual-port family

Seamless Migration to Next-Generation Dual-Port Family

Cypress offers a migration path for all devices in this family to the next-generation devices in the Dual-Port family with a compatible footprint. Please contact Cypress Sales for more details.

Table Product Selection Guide

Density

Part Number Max. Speed MHz
1 Mbit 32K x 36

CYD01S36V
2 Mbit 64K x 36

CYD02S36V/36VA
4 Mbit 128K x 36

CYD04S36V
9 Mbit 256K x 36

CYD09S36V
18 Mbit 512K x 36

CYD18S36V

Max. Access Time Clock to Data

Typical Operating Current mA

Package
256 FBGA
256 FBGA
256 FBGA
256 FBGA
256 FBGA
17 mm x 17 mm 17 mm x 17 mm 17 mm x 17 mm 17 mm x 17 mm 23 mm x 23 mm
• San Jose, CA 95134-1709
• 408-943-2600
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Logic Block Diagram[1]

FTSELL
Ordering Information
512K x 36 18-Mbit 3.3V Synchronous CYD18S36V Dual-Port SRAM

Speed MHz
Ordering Code

Package Name

Package Type

Operating Range
133 CYD18S36V-133BBC BB256B 256-ball Grid Array 23 mm x 23 mm with 1.0-mm pitch BGA Commercial

CYD18S36V-133BBI

BB256B 256-ball Grid Array 23 mm x 23 mm with 1.0-mm pitch BGA Industrial
100 CYD18S36V-100BBC BB256B 256-ball Grid Array 23 mm x 23 mm with 1.0-mm pitch BGA Commercial

CYD18S36V-100BBI

BB256B 256-ball Grid Array 23 mm x 23 mm with 1.0-mm pitch BGA Industrial
256K x 36 9-Mbit 3.3V Synchronous CYD09S36V Dual-Port SRAM

Speed MHz
Ordering Code

Package Name

Package Type

Operating Range
167 CYD09S36V-167BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial
133 CYD09S36V-133BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial

CYD09S36V-133BBI

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Industrial
128K x 36 4-Mbit 3.3V Synchronous CYD04S36V Dual-Port SRAM

Speed MHz
Ordering Code

Package Name

Package Type

Operating Range
167 CYD04S36V-167BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial
133 CYD04S36V-133BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial

CYD04S36V-133BBI

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Industrial
64K x 36 2-Mbit 3.3V Synchronous CYD02S36V Dual-Port SRAM

Speed MHz
Ordering Code

Package Name

Package Type

Operating Range
167 CYD02S36V-167BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial

CYD02S36VA-167BBC BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA
133 CYD02S36V-133BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial

CYD02S36V-133BBI

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Industrial
32K x 36 1-Mbit 3.3V Synchronous CYD01S36V Dual-Port SRAM

Speed MHz
Ordering Code

Package Name

Package Type

Operating Range
167 CYD01S36V-167BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial
133 CYD01S36V-133BBC

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Commercial

CYD01S36V-133BBI

BB256 256-ball Grid Array 17 mm x 17 mm with 1.0-mm pitch BGA Industrial

Page 25 of 28 [+] Feedback

CYD01S36V CYD02S36V/36VA/CYD04S36V

CYD09S36V/CYD18S36V

Package Diagrams

Figure 256-Ball FBGA 17 x 17 mm BB256

TOP VIEW

PIN 1 CORNER
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

A B C D E F G H J K L M N P R T

M C M C A B

BOTTOM VIEW
Ø0.45±0.05 256X -CPLD DEVICES 37K & 39K

PIN 1 CORNER
+205.160X -ALL OTHER DEVICES
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

A B C D E F G H J K L M N P R T

SEATING PLANE
0.20 4X

REFERENCE JEDEC MO-192

A1 A MAX. MAX.
51-85108-*F

Page 26 of 28 [+] Feedback

CYD01S36V CYD02S36V/36VA/CYD04S36V

CYD09S36V/CYD18S36V

Package Diagrams continued

Figure 256-ball FBGA 23 mm x 23 mm x mm BB256B

TOP VIEW

PIN 1 CORNER
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

M C M C A B +-020.50.1560X 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

PIN 1 CORNER
Added CYD18S36V-133BBI to the Ordering Information Section
327338
365315

AEQ YDT

See ECN See ECN

Added note for VCORE Removed preliminary status
2193427 NXR/AESA See ECN Changed tCD2 and tOE Spec from 4ns to 4.4ns for

Template Update.
2623658 VKN/PYRS 12/17/08 Added CYD02S36VA-15AXC part

Sales, Solutions and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

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FLEx36 and FLEx36-E are trademarks of Cypress Semiconductor Corporation. All other trademarks or registered trademarks referenced herein are property of the respective corporations. All products and company names mentioned in this document may be the trademarks of their respective holders.
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Datasheet ID: CYD02S36V-167BBC 508196