CY7C131-55NXC

CY7C131-55NXC Datasheet


CY7C130, CY7C130A CY7C131, CY7C131A

Part Datasheet
CY7C131-55NXC CY7C131-55NXC CY7C131-55NXC (pdf)
Related Parts Information
CY7C131-55JXC CY7C131-55JXC CY7C131-55JXC
CY7C131-25NXC CY7C131-25NXC CY7C131-25NXC
CY7C131-25JXC CY7C131-25JXC CY7C131-25JXC
CY7C131-55NXCT CY7C131-55NXCT CY7C131-55NXCT
CY7C131-55JXIT CY7C131-55JXIT CY7C131-55JXIT
CY7C131-55JXI CY7C131-55JXI CY7C131-55JXI
CY7C131-55JXCT CY7C131-55JXCT CY7C131-55JXCT
CY7C131-25NXCT CY7C131-25NXCT CY7C131-25NXCT
CY7C131-25JXCT CY7C131-25JXCT CY7C131-25JXCT
CY7C131-55NXI CY7C131-55NXI CY7C131-55NXI
CY7C131A-15JXI CY7C131A-15JXI CY7C131A-15JXI
CY7C131-15NXI CY7C131-15NXI CY7C131-15NXI
PDF Datasheet Preview
CY7C130, CY7C130A CY7C131, CY7C131A
1 K x 8 Dual-Port Static RAM
1 K x 8 Dual-Port Static RAM
• True dual-ported memory cells, which allow simultaneous reads of the same memory location
• 1 K x 8 organization
• micron CMOS for optimum speed and power
• High speed access 15 ns
• Low operating power ICC = 110 mA maximum
• Fully asynchronous operation
• Automatic power-down
• Master CY7C130/130A/CY7C131/131A easily expands data
bus width to 16 or more bits using slave CY7C140/CY7C141
• BUSY output flag on CY7C130/130A/CY7C131/131A BUSY
input on CY7C140/CY7C141
• INT flag for port-to-port communication
• Available in 48-pin DIP CY7C130/130A/140 , 52-pin PLCC,
52-pin TQFP
• Pb-free packages available

Functional Description

The CY7C130/130A/CY7C131/131A/CY7C140[1] and CY7C141 are high speed CMOS 1 K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/130A/CY7C131/131A can be used as either a standalone 8-bit dual-port static RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or greater word widths. It is the solution to applications requiring shared or buffered data, such as cache memory for DSP, bit-slice, or multiprocessor designs.

Each port has independent control pins chip enable CE , write enable R/W , and output enable OE . Two flags are provided on each port, BUSY and INT. BUSY signals that the port is trying to access the same location currently being accessed by the other port. INT is an interrupt flag indicating that data is placed in a unique location 3FF for the left port and 3FE for the right port . An automatic power down feature is controlled independently on each port by the chip enable CE pins.

The CY7C130/130A and CY7C140 are available in 48-pin DIP. The CY7C131/131A and CY7C141 are available in 52-pin PLCC, 52-pin Pb-free PLCC, 52-pin PQFP, and 52-pin Pb-free PQFP.

Logic Block Diagram

R/WL CEL

R/WR CER

I/O7L

I/O0L BUSYL[2]

I/O CONTROL

I/O CONTROL

ADDRESS DECODER

MEMORY ARRAY

ADDRESS DECODER

I/O7R I/O0R BUSYR A 9R
[3] INTL

CEL OEL R/WL

ARBITRATION LOGIC
7C130/7C131 ONLY AND

INTERRUPT LOGIC

CER OER R/WR

Notes CY7C130 and CY7C130A are functionally identical CY7C131 and CY7C131A are functionally identical. CY7C130/130A/CY7C131/131A Master BUSY is open drain output and requires pull-up resistor.

CY7C140/CY7C141 Slave BUSY is input. Open drain outputs pull-up resistor required.

INTR[3]
• San Jose, CA 95134-1709
• 408-943-2600

CY7C130, CY7C130A CY7C131, CY7C131A

Contents

Pin Configurations 3 Pin Definitions 4 Selection Guide 4 Maximum Ratings 5 Operating Range 5 Electrical Characteristics 5 Capacitance 6 Switching Characteristics 7 Switching Characteristics 9 Switching Waveforms 11 Typical DC and AC Characteristics 16
Ordering Information 17 Ordering Code Definitions 17

Package Diagrams 18 Acronyms 20 Document Conventions 20

Units of Measure 20 Document History Page 21 Sales, Solutions, and Legal Information 22

Worldwide Sales and Design Support 22 Products 22 PSoC Solutions 22

Page 2 of 22

CY7C130, CY7C130A CY7C131, CY7C131A

Pin Configurations

Figure Pin Diagram - DIP Top View

CE L R/W L BUSY L

INTL

OEL A0L

A1L A2L A3L

A4L A5L

A7L A8L

I/O0L I/O1L I/O2L

I/O3L I/O4L

I/O5L I/O6L I/O7L
12 7C130 37 13 7C140 36

CER R/WR BUSYR

INTR

OER A0R

A1R A2R

A4R A5R

A7R A8R

I/O7R

I/O6R I/O5R I/O4R I/O3R I/O2R

I/O1R I/O0R

Figure Pin Diagram - PLCC Top View

Figure Pin Diagram - PQFP Top View

A0L OEL NC INTL BUSYL CR/ELWL VCC CER R/WR BUSYR INTR NC

A0L OEL NC INTL BUSYL CR/ELWL VCC CER R/WR BUSYR INTR NC

I/O4L I/O5L I/O6L I/O7L

NC GND I/O0R I/O1R I/O2R I/O3R I/O4R I/O5R I/O6R

A1L A2L A3L A4L A5L A6L A7L A8L A9L I/O0L I/O1L I/O2L I/O3L
7 6 5 4 3 2 1 52 51 50 49 48 47
7C131
7C141
2122 23 24 25 26 27 28 29 30 31 32 33

OER A0R A1R A2R A3R A4R A5R A6R A7R A8R A9R NC

I/O7R

A1L A2L A3L A4L A5L A6L A7L A8L A9L I/O0L I/O1L I/O2L I/O3L
Ordering Information

Speed ns 55 15
Ordering Code

CY7C130-55PC CY7C131A-15JXI CY7C131-15NXI CY7C131-25JXC CY7C131-25NXC CY7C131-55JXC CY7C131-55NXC CY7C131-55JXI CY7C131-55NXI

Package Name P25 J69 N52 J69 N52 J69 N52 J69 N52

Package Type
48-pin 600 Mil Molded DIP 52-pin Pb-free Plastic Leaded Chip Carrier 52-pin Pb-free Plastic Quad Flatpack 52-pin Pb-free Plastic Leaded Chip Carrier 52-pin Pb-free Plastic Quad Flatpack 52-pin Pb-free Plastic Leaded Chip Carrier 52-pin Pb-free Plastic Quad Flatpack 52-pin Pb-free Plastic Leaded Chip Carrier 52-pin Pb-free Plastic Quad Flatpack
Ordering Code Definitions CY7C 13XX - XX X

Temperature Range X = C or I C = Commercial I = Industrial

XX = P or JX or NX or N P = 48-pin Molded DIP JX = 52-pin Plastic Leaded Chip Carrier Pb-free NX = 52-pin Plastic Quad Flatpack Pb-free N = 52-pin Plastic Quad Flatpack

XX = Speed = 55 or 15 or 25 ns
13XX = 131 or 131A = Part number identifier

CY7C = Cypress SRAMs

Operating Range

Commercial Industrial

Commercial

Commercial

Industrial

Page 17 of 22

Package Diagrams

CY7C130, CY7C130A CY7C131, CY7C131A

Figure 48-pin 600 Mil Sidebraze DIP D26
51-80044 *B

Figure 52-pin Pb-free Plastic Leaded Chip Carrier J69
51-85004 *C

Page 18 of 22

CY7C130, CY7C130A CY7C131, CY7C131A

Package Diagrams continued

Figure 48-pin 600 Mil Molded DIP P25

Figure 52-pin Pb-free Plastic Quad Flatpack N52
51-85020 *D
51-85042 *C

Page 19 of 22

Acronyms

Acronym CE CMOS DIP I/O OE PLCC PQFP SRAM TQFP TTL

Description chip enable complementary metal oxide semiconductor dual in-line package input/output enable plastic leaded chip carrier plastic quad flat pack static random access memory thin quad flat pack logic

Document Conventions

Units of Measure

Symbol °C MHz µA mA ms mV ns pF V W

Unit of Measure degree Celcius megahertz microamperes milliamperes milliseconds millivolts nanoseconds picofarad volts watts

CY7C130, CY7C130A CY7C131, CY7C131A

Page 20 of 22

CY7C130, CY7C130A CY7C131, CY7C131A

Document History Page

Document Title CY7C130/CY7C130A/CY7C131/CY7C131A 1K x 8 Dual-Port Static RAM Document Number 38-06002

ECN No.

Orig. of Change

Submission Date
Added CY7C131-15JI to ordering information Added Pb-Free parts to ordering information CY7C131-15JXI
2623540 VKN/PYRS 12/17/08 Added CY7C130A and CY7C131A parts

Removed military information
Updated ordering information table
2897217 RAME
03/22/2010 Updated Ordering Information

Updated Package Diagrams
3054633 ADMU
10/11/2010 Updated Ordering Information and added Ordering Code Definitions.

Updated Package Diagrams.

Added Acronyms and Units of Measure.

Minor edits and updated in new template.
3402163 ADMU
10/12/2011 Removed pruned part CY7C131-25NC from Ordering Information

Updated Package Diagrams.

Page 21 of 22

CY7C130, CY7C130A CY7C131, CY7C131A

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations.

Products Automotive Clocks & Buffers Interface Lighting & Power Control

Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF
cypress.com/go/automotive cypress.com/go/clocks
cypress.com/go/interface cypress.com/go/powerpsoc
cypress.com/go/plc cypress.com/go/memory
cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB
cypress.com/go/wireless

PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

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More datasheets: STK16C88-WF45 | M13045 SL002 | M13045 SL005 | M13045 SL001 | CQ3202 | 74LVTH322373GX | 74LVTH322373G | CY7C131-55JXC | CY7C131-25NXC | CY7C131-25JXC


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Datasheet ID: CY7C131-55NXC 507944