CY7C106D CY7C1006D
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CY7C106D-10VXIT (pdf) |
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CY7C106D-10VXI |
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CY7C1006D-10VXI |
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CY7C1006D-10VXIT |
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CY7C106D CY7C1006D 1-Mbit 256 K x 4 Static RAM 1-Mbit 256 K x 4 Static RAM • Pin- and function-compatible with CY7C106B/CY7C1006B • High speed tAA = 10 ns • Low active power ICC = 80 mA 10 ns • Low CMOS standby power ISB2 = mA • V Data Retention • Automatic power-down when deselected • CMOS for optimum speed/power • TTL-compatible inputs and outputs • CY7C106D available in Pb-free 28-pin 400-Mil wide Molded SOJ package. CY7C1006D available in Pb-free 28-pin 300-Mil wide Molded SOJ package Functional Description The CY7C106D [1] and CY7C1006D [1] are high-performance CMOS static RAMs organized as 262,144 words by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable CE , an active LOW Output Enable OE , and tri-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when the devices are deselected. The four input and output pins IO0 through IO3 are placed in a high-impedance state when • Deselected CE HIGH • Outputs are disabled OE HIGH • When the write operation is active CE and WE LOW Write to the device by taking Chip Enable CE and Write Enable WE inputs LOW. Data on the four IO pins IO0 through IO3 is then written into the location specified on the address pins A0 through A17 . Read from the device by taking Chip Enable CE and Output Enable OE LOW while forcing Write Enable WE HIGH. Under these conditions, the contents of the memory location specified by the address pins appears on the four IO pins. Both CY7C106D and CY7C1006D devices are suitable for interfacing with processors that have TTL I/P levels. They are not suitable for processors that require CMOS I/P levels. Please see Electrical Characteristics on page 4 for more details and suggested alternatives. Logic Block Diagram ROW DECODER A0 A10 A11 A12 A13 A14 A15 A16 A17 SENSE AMPS INPUT BUFFER 256K x 4 ARRAY CE WE COLUMN DECODER POWER DOWN Note For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at • San Jose, CA 95134-1709 • 408-943-2600 CY7C106D CY7C1006D Contents Pin Configurations 3 Selection Guide 3 Maximum Ratings 4 Operating Range 4 Electrical Characteristics 4 Capacitance 5 Thermal Resistance 5 AC Test Loads and Waveforms 5 Data Retention Characteristics 6 Data Retention Waveform 6 Switching Characteristics 7 Switching Waveforms 8 Truth Table 11 Ordering Information 11 Ordering Code Definitions 11 Package Diagrams 12 Acronyms 14 Document Conventions 14 Units of Measure 14 Document History Page 15 Sales, Solutions and Legal Information 16 Worldwide Sales and Design Support 16 Products 16 Solutions 16 Cypress Developer Community 16 Technical Support 16 Page 2 of 16 Pin Configurations Selection Guide Maximum Access Time Maximum Operating Current Maximum Standby Current Figure 28-pin SOJ pinout Top View [2] A6 7 A7 8 AA190 10 11 CE 12 OE 13 GND 14 28 VCC 27 A17 26 A16 25 A15 24 A14 23 A13 22 A12 21 A11 20 NC 19 IO3 18 IO2 17 IO1 16 IO0 15 WE CY7C106D-10 CY7C1006D-10 10 80 3 CY7C106D CY7C1006D Unit ns mA Note NC pins are not connected on the die. Page 3 of 16 CY7C106D CY7C1006D Maximum Ratings Exceeding the maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage Temperature °C to +150 °C Ambient Temperature with Power Applied °C to +125 °C Supply Voltage on VCC Relative to GND [3] V to V DC Voltage Applied to Outputs in High Z State [3] V to VCC + V DC Input Voltage [3] V to VCC + V Current into Outputs LOW 20 mA Static Discharge Voltage per MIL-STD-883, Method 3015 > 2001 V Latch-up > 200 mA Operating Range Range Industrial Ambient Temperature °C to +85 °C VCC 5 V V Speed 10 ns Electrical Characteristics Over the Operating Range Parameter Test Conditions 7C106D-10 7C1006D-10 Unit Output HIGH Voltage IOH = mA IOH = mA Output LOW Voltage Ordering Information Speed ns 10 Ordering Code CY7C106D-10VXI CY7C1006D-10VXI Package Diagram 51-85032 51-85031 Package Type 28-pin 400-Mil Molded SOJ Pb-free 28-pin 300-Mil Molded SOJ Pb-free Please contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions CY 7 C 1 xx6 D - 10 VX I Temperature Range I = Industrial Package Type VX = 28-pin Molded SOJ Pb-free Speed 10 ns D = C9, 90 nm Technology xx6 = 06 or 006 = 400-Mil / 300-Mil 1-Mbit density 1 = Fast Asynchronous SRAM family Technology Code C = CMOS 7 = SRAM CY = Cypress Operating Range Industrial Page 11 of 16 CY7C106D CY7C1006D Package Diagrams Figure 28-pin SOJ 300 Mils V28.3 Molded SOJ V21 Package Outline, 51-85031 51-85031 *E Page 12 of 16 CY7C106D CY7C1006D Package Diagrams continued Figure 28-pin 400 Mils V28.4 Molded SOJ V28 Package Outline, 51-85032 51-85032 *E Page 13 of 16 Acronyms Acronym Chip Enable CMOS Complementary Metal-Oxide Semiconductor Input/Output Output Enable Small Outline J-lead SRAM Static Random Access Memory Transistor-Transistor Logic Write Enable CY7C106D CY7C1006D Document Conventions Units of Measure Symbol °C MHz µA µs mA ns % pF V W Unit of Measure degree Celsius megahertz microampere microsecond milliampere nanosecond ohm percent picofarad volt watt Page 14 of 16 CY7C106D CY7C1006D Document History Page Document Title CY7C106D/CY7C1006D, 1-Mbit 256 K x 4 Static RAM Document Number 38-05459 ECN NO. Issue Date Orig. of Change Description of Change 201560 See ECN Pb-free offering in the ‘ordering information’ 262950 See ECN RKF Added Tpower Spec in Switching Characteristics table Shaded ‘Ordering Information’ See ECN See ECN RKF Reduced Speed bins to -10 and -12 ns 560995 See ECN VKN Converted from Preliminary to Final Removed Commercial Operating range Removed 12 ns speed bin Added ICC values for the frequencies 83MHz, 66MHz and 40MHz Updated Thermal Resistance table Updated Ordering Information table Changed Overshoot spec from VCC+2V to VCC+1V in footnote #3 802877 See ECN VKN Changed ICC spec from 60 mA to 80 mA for 100MHz, 55 mA to 72 mA for 83MHz, 45 mA to 58 mA for 66MHz, 30 mA to 37 mA for 40MHz 2898399 03/24/2010 AJU Updated Package Diagrams 3104943 12/08/2010 AJU Added Ordering Code Definitions. 3244490 04/29/2011 PRAS Updated Package Diagrams. Added Acronyms and Units of Measure. Updated in new template. 4033580 06/19/2013 MEMJ Updated Functional Description. Page 15 of 16 CY7C106D CY7C1006D Sales, Solutions and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Solutions Automotive Clocks & Buffers Interface Lighting & Power Control Memory PSoC cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc cypress.com/go/memory cypress.com/go/psoc psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP Cypress Developer Community | Forums | Blogs | Video | Training Technical Support cypress.com/go/support Touch Sensing cypress.com/go/touch USB Controllers cypress.com/go/USB Wireless/RF cypress.com/go/wireless Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 16 of 16 |
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