CY7C1021CV33-15ZC

CY7C1021CV33-15ZC Datasheet

CY7C1021CV33

Part	Datasheet
CY7C1021CV33-15ZC	CY7C1021CV33-15ZC (pdf)

Related Parts	Information
CY7C1021CV33-10ZC	CY7C1021CV33-10ZC
CY7C1021CV33-12VC	CY7C1021CV33-12VC
CY7C1021CV33-15VC	CY7C1021CV33-15VC
CY7C1021CV33-10VC	CY7C1021CV33-10VC

PDF Datasheet Preview
CY7C1021CV33 64K x 16 Static RAM ROW DECODER A8 A9 A10 A11 A12 A13 A14 A15 SENSE AMPS • Pin- and function-compatible with CY7C1021BV33 • High speed tAA = 8, 10, 12, and 15 ns • CMOS for optimum speed/power • Low active power 360 mW max. • Data retention at 2.0V • Automatic power-down when deselected • Independent control of upper and lower bits • Available in 44-pin TSOP II, 400-mil SOJ, 48-ball FBGA Functional Description The CY7C1021CV33 is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable Logic Block Diagram DATA IN DRIVERS 64K x 16 RAM Array 512 X 2048 COLUMN DECODER BLE is LOW, then data from I/O pins I/O1 through I/O8 , is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from I/O pins I/O9 through I/O16 is written into the location specified on the address pins A0 through A15 . Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable BHE is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the end of this data sheet for a complete description of Read and Write modes. The input/output pins I/O1 through I/O16 are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a Write operation CE LOW, and WE LOW . The CY7C1021CV33 is available in standard 44-pin TSOP Type II 400-mil-wide SOJ packages, as well as a 48-ball FBGA. BHE WE CE OE BLE Pin Configuration SOJ / TSOP II Top View A4 1 A3 2 A2 3 A1 4 A0 5 CE 6 I/O1 7 I/O2 8 I/O3 9 I/O4 10 VCC 11 VSS 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 WE 17 A15 18 A14 19 A13 20 A12 21 NC 22 44 A5 43 A6 42 A7 41 OE 40 BHE 39 BLE 38 I/O16 37 I/O15 36 I/O14 35 I/O13 34 VSS 33 VCC 32 I/O12 31 I/O11 30 I/O10 29 I/O9 28 NC 27 A8 26 A9 25 A10 24 A11 23 NC Selection Guide Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current CY7C1021CV33-8 95 5 CY7C1021CV33-10 CY7C1021CV33-12 CY7C1021CV33-15 Unit Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Pin Configuration 48-ball FBGA Top View BLE OE A0 A1 A2 NC I/O8 BHE A3 A4 CE I/O0 I/O9 I/O10 A5 A6 I/O2 I/O1 Ordering Information Speed ns 8 10 Ordering Code CY7C1021CV33-8VC CY7C1021CV33-8ZC CY7C1021CV33-8BAC CY7C1021CV33-10VC CY7C1021CV33-10VI CY7C1021CV33-10ZC CY7C1021CV33-10ZI CY7C1021CV33-10BAC CY7C1021CV33-10BAI CY7C1021CV33-12VC CY7C1021CV33-12VI CY7C1021CV33-12ZC CY7C1021CV33-12ZI CY7C1021CV33-12BAC CY7C1021CV33-12BAI CY7C1021CV33-15VC CY7C1021CV33-15VI CY7C1021CV33-15ZC CY7C1021CV33-15ZI CY7C1021CV33-15BAC CY7C1021CV33-15BAI CY7C1021CV33 Package Name V34 Z44 BA48A V34 Package Type 44-lead 400-Mil Molded SOJ 44-lead TSOP Type II 48-ball FBGA 44-lead 400-Mil Molded SOJ 44-lead TSOP Type II BA48A 48-ball FBGA 44-lead 400-Mil Molded SOJ 44-lead TSOP Type II BA48A 48-ball FBGA 44-lead 400-Mil Molded SOJ 44-lead TSOP Type II BA48A 48-ball FBGA Operating Range Commercial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Page 9 of 12 Package Diagrams CY7C1021CV33 48-Ball mm x mm x mm FBGA BA48A 51-85096-E Page 10 of 12 Package Diagrams continued 44-Lead 400-Mil Molded SOJ V34 CY7C1021CV33 44-pin TSOP II Z44 51-85082-B 51-85087-*A All products and company names mentioned in this document are the trademarks of their respective holders. Page 11 of 12 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C1021CV33 Document History Page Document Title CY7C1021CV33 64K x 16 Static RAM Document Number 38-05132 ECN NO. Issue Date Orig. of Change Description of Change 109472 12/06/01 HGK New Data Sheet 115044 05/08/02 HGK Ram7 version C4K x 16 Async. Remove “Preliminary” 115808 06/25/02

PDF Datasheet Preview

CY7C1021CV33
64K x 16 Static RAM

ROW DECODER A8 A9 A10 A11 A12 A13 A14 A15

SENSE AMPS
• Pin- and function-compatible with CY7C1021BV33
• High speed
tAA = 8, 10, 12, and 15 ns
• CMOS for optimum speed/power
• Low active power
360 mW max.
• Data retention at 2.0V
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II, 400-mil SOJ, 48-ball FBGA

Functional Description

The CY7C1021CV33 is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable

Logic Block Diagram

DATA IN DRIVERS
64K x 16

RAM Array
512 X 2048

COLUMN DECODER

BLE is LOW, then data from I/O pins I/O1 through I/O8 , is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from I/O pins I/O9 through I/O16 is written into the location specified on the address pins A0 through A15 .

Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable BHE is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the end of this data sheet for a complete description of Read and Write modes.

The input/output pins I/O1 through I/O16 are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a Write operation CE LOW, and WE LOW .

The CY7C1021CV33 is available in standard 44-pin TSOP Type II 400-mil-wide SOJ packages, as well as a 48-ball FBGA.

BHE WE CE OE BLE

Pin Configuration

SOJ / TSOP II Top View

A4 1 A3 2 A2 3 A1 4 A0 5 CE 6

I/O1 7 I/O2 8 I/O3 9

I/O4 10 VCC 11 VSS 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 WE 17

A15 18 A14 19 A13 20 A12 21 NC 22
44 A5 43 A6
42 A7 41 OE
40 BHE 39 BLE
38 I/O16 37 I/O15 36 I/O14 35 I/O13 34 VSS 33 VCC 32 I/O12 31 I/O11 30 I/O10 29 I/O9 28 NC 27 A8 26 A9 25 A10 24 A11 23 NC

Selection Guide

Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current

CY7C1021CV33-8 95 5

CY7C1021CV33-10 CY7C1021CV33-12 CY7C1021CV33-15 Unit

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose
• CA 95134
• 408-943-2600

Pin Configuration
48-ball FBGA

Top View

BLE OE A0 A1 A2 NC

I/O8 BHE A3 A4 CE I/O0

I/O9 I/O10 A5 A6 I/O2 I/O1
Ordering Information

Speed ns 8 10
Ordering Code CY7C1021CV33-8VC CY7C1021CV33-8ZC CY7C1021CV33-8BAC CY7C1021CV33-10VC CY7C1021CV33-10VI CY7C1021CV33-10ZC CY7C1021CV33-10ZI CY7C1021CV33-10BAC CY7C1021CV33-10BAI CY7C1021CV33-12VC CY7C1021CV33-12VI CY7C1021CV33-12ZC CY7C1021CV33-12ZI CY7C1021CV33-12BAC CY7C1021CV33-12BAI CY7C1021CV33-15VC CY7C1021CV33-15VI CY7C1021CV33-15ZC CY7C1021CV33-15ZI CY7C1021CV33-15BAC CY7C1021CV33-15BAI

CY7C1021CV33

Package Name V34 Z44 BA48A V34

Package Type 44-lead 400-Mil Molded SOJ 44-lead TSOP Type II 48-ball FBGA 44-lead 400-Mil Molded SOJ
44-lead TSOP Type II

BA48A 48-ball FBGA
44-lead 400-Mil Molded SOJ
44-lead TSOP Type II

BA48A 48-ball FBGA
44-lead 400-Mil Molded SOJ
44-lead TSOP Type II

BA48A 48-ball FBGA

Operating Range

Commercial

Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial

Page 9 of 12

Package Diagrams

CY7C1021CV33
48-Ball mm x mm x mm FBGA BA48A
51-85096-*E

Page 10 of 12

Package Diagrams continued
44-Lead 400-Mil Molded SOJ V34

CY7C1021CV33
44-pin TSOP II Z44
51-85082-*B
51-85087-*A

All products and company names mentioned in this document are the trademarks of their respective holders.

Page 11 of 12

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

CY7C1021CV33

Document History Page

Document Title CY7C1021CV33 64K x 16 Static RAM Document Number 38-05132

ECN NO.

Issue Date

Orig. of Change

Description of Change
109472 12/06/01 HGK New Data Sheet
115044 05/08/02 HGK Ram7 version C4K x 16 Async.

Remove “Preliminary”
115808 06/25/02

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY7C1021CV33-15ZC Datasheet file may be downloaded here without warranties.

Datasheet ID: CY7C1021CV33-15ZC 507894