CY7C1021CV26
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CY7C1021CV26-15BAET (pdf) |
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CY7C1021CV26-15VXET |
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CY7C1021CV26-15VXE |
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CY7C1021CV26-15BAE |
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CY7C1021CV26 1-Mbit 64 K x 16 Static RAM 1-Mbit 64 K x 16 Static RAM • Temperature Range Automotive °C to 125 °C • High speed tAA = 15 ns • Optimized voltage range V to V • Low active power 220 mW Max • Automatic power-down when deselected • Independent control of upper and lower bits • CMOS for optimum speed/power • Available in Pb-free and non Pb-free 44-pin TSOP II , 44-pin 400-Mil Molded SOJ and Pb-free 48-ball FPBGA packages Functional Description The CY7C1021CV26 is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O1 through I/O8 , is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from I/O pins I/O9 through I/O16 is written into the location specified on the address pins A0 through A15 . Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable BHE is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the end of this data sheet for a complete description of Read and Write modes. The input/output pins I/O1 through I/O16 are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a Write operation CE LOW, and WE LOW . Logic Block Diagram DATA IN DRIVERS ROW DECODER A8 A9 A10 A11 A12 A13 A14 A15 SENSE AMPS 64K x 16 RAM Array COLUMN DECODER BHE WE CE OE BLE • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY7C1021CV26 Contents Selection Guide 3 Pin Configuration 3 Pin Definitions 3 Maximum Ratings 4 Operating Range 4 Electrical Characteristics 4 Capacitance 4 Thermal Resistance 4 AC Test Loads and Waveforms 5 Switching Characteristics 5 Switching Waveforms 7 Read Cycle No. 1 7 Read Cycle No. 2 OE Controlled 7 Write Cycle No. 1 CE Controlled 8 Write Cycle No. 2 BLE or BHE Controlled 8 Write Cycle No. 3 WE Controlled, LOW 9 Truth Table 9 Ordering Information 10 Ordering Code Definitions 10 Package Diagrams 11 Acronyms 13 Document Conventions 13 Units of Measure 13 Document History Page 14 Sales, Solutions, and Legal Information 15 Worldwide Sales and Design Support 15 Products 15 PSoC Solutions 15 Page 2 of 15 [+] Feedback CY7C1021CV26 Selection Guide[1] Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Unit Pin Configuration[2] TSOP II -Top View A4 1 A3 2 A2 3 A1 4 A0 5 CE 6 I/O1 7 I/O2 8 I/O3 9 I/O4 10 VCC 11 VSS 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 WE 17 A15 18 AA1143 19 20 A12 21 NC 22 44 A5 43 A6 42 A7 41 OE 40 BHE 39 BLE 38 I/O16 37 I/O15 36 I/O14 35 34 VI/OSS13 33 VCC 32 I/O12 31 I/O11 30 29 II//OO190 28 NC 27 A8 26 25 24 AAA91101 23 NC Pin Definitions Pin Name Pin Number I/O Type Ordering Information Cypress offers other versions of this type of product in many different configurations and features. The following table contains only the list of parts that are currently available. For a complete listing of all options, visit the Cypress website at and refer to the product summary page at or contact your local sales representative. Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives and distributors. To find the office closest to you, visit us at Speed ns 15 Ordering Code CY7C1021CV26-15ZSXE CY7C1021CV26-15VXE CY7C1021CV26-15BAE CY7C1021CV26-15BAET CY7C1021CV26-15VXET CY7C1021CV26-15ZSXET Package Name Package Type 51-85087 44-pin TSOP Type II Pb-free 51-85082 44-pin 400-Mil Molded SOJ Pb-free 51-85150 48-ball FPBGA 6 x 8 x 1 mm Pb-free 51-85150 48-ball FPBGA 6 x 8 x 1 mm Pb-free 51-85082 44-pin 400-Mil Molded SOJ Pb-free 51-85087 44-pin TSOP Type II Pb-free Operating Range Automotive Ordering Code Definitions CY7C 1021 C V26 - 15 XXX E X X = T or Blank T = Tape and Reel Blank = Tube Temperature Range E = Automotive Package Type XXX = ZSX or VX or BA ZSX = 44-pin TSOP Type II Pb-free VX = 44-pin 400-Mil Molded SOJ Pb-free BA = 48-ball FPBGA Pb-free Speed Grade 15 ns V26 = V Process Technology µm 1021 = Part Identifier CY7C = Cypress SRAMs Page 10 of 15 [+] Feedback Package Diagrams Figure 44-pin TSOP II, 51-85087 CY7C1021CV26 51-85087 *C Figure 44-pin 400-Mil Molded SOJ, 51-85082 51-85087-*A 51-85082 *C Page 11 of 15 [+] Feedback Package Diagrams continued Figure 48-ball FBGA 6 x 8 x 1 mm , 51-85150 CY7C1021CV26 51-85150 *F Page 12 of 15 [+] Feedback CY7C1021CV26 Acronyms Acronym CMOS CE I/O OE SOJ SRAM TSOP TTL FPBGA WE Description complementary metal oxide semiconductor chip enable input/output enable small outline J-lead static random access memory thin small-outline package transistor-transistor logic fine-pitch ball grid array write enable Document Conventions Units of Measure Symbol ns V µA mA mW MHz pF °C W % Unit of Measure nano seconds Volts micro Amperes milli Amperes milli Watts Mega Hertz pico Farad degree Celcius Watts percent Page 13 of 15 [+] Feedback CY7C1021CV26 Document History Page Document Title CY7C1021CV26 1-Mbit 64 K x 16 Static RAM Document Number 38-05589 ECN NO. Issue Date Orig. of Change Description of Change 238454 See ECN RKF New data sheet for Automotive 335861 See ECN SYT Added Lead-Free Product Information Included the 44-Lead 400-Mil Molded SOJ V34 Package 493543 See ECN Changed the description Input Leakage Current in oDf CIIXEflreocmtriIcnapl uCt hLaoraadctCeruisrrteicnst to table Removed IOS parameter from DC Electrical Characteristics table Updated Ordering Information Table 2897087 03/22/10 AJU Removed obsolete parts from ordering information table Updated package diagrams 3057593 10/13/2010 PRAS Updated Ordering Information and added Ordering Code Definitions. Updated Package Diagrams. 3098812 12/01/2010 PRAS Added Acronyms and Units of Measure. Minor edits and updated in new template. Page 14 of 15 [+] Feedback CY7C1021CV26 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc cypress.com/go/memory cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 15 of 15 [+] Feedback |
More datasheets: HEDS-9733#T51 | HEDS-9731#B51 | HEDS-9731#151 | HEDS-9732#U50 | FFPF10U60DNTU | CY7C1523JV18-300BZXC | 7343-G1C2-AUWA-X-MS | CY7C1021CV26-15VXET | CY7C1021CV26-15VXE | CY7C1021CV26-15BAE |
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