CY7C1021BNV33L-10ZXC

CY7C1021BNV33L-10ZXC Datasheet

CY7C1021BNV33

Part	Datasheet
CY7C1021BNV33L-10ZXC	CY7C1021BNV33L-10ZXC (pdf)

Related Parts	Information
CY7C1021BNV33L-15VXC	CY7C1021BNV33L-15VXC
CY7C1021BNV33L-10VXCT	CY7C1021BNV33L-10VXCT
CY7C1021BNV33L-15ZXCT	CY7C1021BNV33L-15ZXCT
CY7C1021BNV33L-15ZXC	CY7C1021BNV33L-15ZXC
CY7C1021BNV33L-15VXCT	CY7C1021BNV33L-15VXCT
CY7C1021BNV33L-12ZXCT	CY7C1021BNV33L-12ZXCT
CY7C1021BNV33L-12ZXC	CY7C1021BNV33L-12ZXC
CY7C1021BNV33L-10VXC	CY7C1021BNV33L-10VXC
CY7C1021BNV33L-10ZXCT	CY7C1021BNV33L-10ZXCT

PDF Datasheet Preview
CY7C1021BNV33 64K x 16 Static RAM Functional Description[1] • 3.3V operation • High speed tAA = 10, 12, 15 ns • CMOS for optimum speed/power • Low Active Power L version 576 mW max. • Low CMOS Standby Power L version mW max. • Automatic power-down when deselected • Independent control of upper and lower bits • Available in 44-pin TSOP II and 400-mil SOJ • Available in a 48-Ball Mini BGA package The CY7C1021BNV is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O1 through I/O8 , is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from I/O pins I/O9 through I/O16 is written into the location specified on the address pins A0 through A15 . Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable BHE is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of this data sheet for a complete description of read and write modes. The input/output pins I/O1 through I/O16 are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a write operation CE LOW, and WE LOW . The CY7C1021BNV is available in 400-mil-wide SOJ, standard 44-pin TSOP Type II, and 48-ball mini BGA packages. Logic Block Diagram DATA IN DRIVERS Pin Configurations SOJ / TSOP II Top View ROW DECODER A8 A9 A10 A11 A12 A13 A14 A15 SENSE AMPS 64K x 16 RAM Array 512 X 2048 COLUMN DECODER BHE WE CE OE BLE A3 2 A2 3 A1 4 A0 5 CE 6 I/O1 7 I/O2 8 I/O3 9 I/O4 10 VCC 11 VSS 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 WE 17 A15 18 A14 19 A13 20 A12 21 NC 22 44 A5 43 A6 42 A7 41 OE 40 BHE 39 BLE 38 I/O16 37 I/O15 36 I/O14 35 I/O13 34 VSS 33 VCC 32 I/O12 31 I/O11 30 I/O10 29 I/O9 28 NC 27 A8 26 A9 25 A10 24 A11 23 NC Note For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback Selection Guide Maximum Access Time ns Maximum Operating Current mA Commercial Industrial Ordering Information Speed ns Ordering Code Package Diagram Package Type CY7C1021BNV33L-10VXC 51-85082 44-Lead 400-Mil Molded SOJ Pb-free CY7C1021BNV33L-10ZXC 51-85087 44-Lead TSOP Type II Pb-free CY7C1021BNV33L-12ZC 51-85087 44-Lead TSOP Type II CY7C1021BNV33L-12ZXC 51-85087 44-Lead TSOP Type II Pb-free CY7C1021BNV33L-15ZC 51-85087 44-Lead TSOP Type II CY7C1021BNV33L-15ZXC 51-85087 44-Lead TSOP Type II Pb-free CY7C1021BNV33L-15VXC 51-85082 44-Lead 400-Mil Molded SOJ Pb-free CY7C1021BNV33L-15BAI 51-85096 48-ball Mini Ball Grid Array 7 mm x 7 mm CY7C1021BNV33L-15VXI 51-85082 44-Lead 400-Mil Molded SOJ Pb-free CY7C1021BNV33L-15ZXI 51-85087 44-Lead TSOP Type II Pb-free CY7C1021BNV33L-15ZI 51-85087 44-Lead TSOP Type II Please contact local sales representative regarding availability of these parts. Operating Range Commercial Industrial Package Diagrams 48-ball FBGA 7 mm x 7 mm x mm 51-85096 TOP VIEW PIN 1 CORNER LASER MARK 12 3 4 5 6 A B C D E F G H BOTTOM VIEW M C M C A B Ø0.30±0.05 48X 6 54321 PIN 1 CORNER A B C D E F G H B 0.15 4X SEATING PLANE C MAX. 51-85096-F Page 8 of 10 [+] Feedback Package Diagrams continued 44-Lead 400-Mil Molded SOJ 51-85082 CY7C1021BNV33 44-Pin TSOP Type II 51-85087 51-85082-B 51-85087-*A

PDF Datasheet Preview

CY7C1021BNV33
64K x 16 Static RAM

Functional Description[1]
• 3.3V operation
• High speed
tAA = 10, 12, 15 ns
• CMOS for optimum speed/power
• Low Active Power L version
576 mW max.
• Low CMOS Standby Power L version
mW max.
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
• Available in a 48-Ball Mini BGA package

The CY7C1021BNV is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to the device is accomplished by taking Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O1 through I/O8 , is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from I/O pins I/O9 through I/O16 is written into the location specified on the address pins A0 through A15 .

Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable BHE is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of this data sheet for a complete description of read and write modes.

The input/output pins I/O1 through I/O16 are placed in a high-impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , the BHE and BLE are disabled BHE, BLE HIGH , or during a write operation CE LOW, and WE LOW .

The CY7C1021BNV is available in 400-mil-wide SOJ, standard 44-pin TSOP Type II, and 48-ball mini BGA packages.

Logic Block Diagram

DATA IN DRIVERS

Pin Configurations

SOJ / TSOP II

Top View

ROW DECODER A8 A9 A10 A11 A12 A13 A14 A15

SENSE AMPS
64K x 16

RAM Array
512 X 2048

COLUMN DECODER

BHE WE CE OE BLE

A3 2 A2 3 A1 4 A0 5 CE 6 I/O1 7 I/O2 8 I/O3 9

I/O4 10 VCC 11 VSS 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 WE 17

A15 18 A14 19 A13 20 A12 21 NC 22
44 A5 43 A6
42 A7 41 OE
40 BHE
39 BLE
38 I/O16 37 I/O15 36 I/O14 35 I/O13 34 VSS 33 VCC 32 I/O12 31 I/O11 30 I/O10 29 I/O9 28 NC
27 A8 26 A9 25 A10 24 A11 23 NC

Note For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at

Cypress Semiconductor Corporation
• 198 Champion Court
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

Selection Guide

Maximum Access Time ns

Maximum Operating Current mA

Commercial

Industrial
Ordering Information

Speed ns
Ordering Code

Package Diagram

Package Type

CY7C1021BNV33L-10VXC 51-85082 44-Lead 400-Mil Molded SOJ Pb-free

CY7C1021BNV33L-10ZXC 51-85087 44-Lead TSOP Type II Pb-free

CY7C1021BNV33L-12ZC 51-85087 44-Lead TSOP Type II

CY7C1021BNV33L-12ZXC 51-85087 44-Lead TSOP Type II Pb-free

CY7C1021BNV33L-15ZC 51-85087 44-Lead TSOP Type II

CY7C1021BNV33L-15ZXC 51-85087 44-Lead TSOP Type II Pb-free

CY7C1021BNV33L-15VXC 51-85082 44-Lead 400-Mil Molded SOJ Pb-free

CY7C1021BNV33L-15BAI 51-85096 48-ball Mini Ball Grid Array 7 mm x 7 mm

CY7C1021BNV33L-15VXI 51-85082 44-Lead 400-Mil Molded SOJ Pb-free

CY7C1021BNV33L-15ZXI 51-85087 44-Lead TSOP Type II Pb-free

CY7C1021BNV33L-15ZI
51-85087 44-Lead TSOP Type II

Please contact local sales representative regarding availability of these parts.

Operating Range

Commercial

Industrial

Package Diagrams
48-ball FBGA 7 mm x 7 mm x mm 51-85096

TOP VIEW

PIN 1 CORNER LASER MARK
12 3 4 5 6

A B C D E F G H

BOTTOM VIEW

M C M C A B Ø0.30±0.05 48X
6 54321

PIN 1 CORNER

A B C D E F G H

B 0.15 4X

SEATING PLANE C

MAX.
51-85096-*F

Page 8 of 10 [+] Feedback

Package Diagrams continued
44-Lead 400-Mil Molded SOJ 51-85082

CY7C1021BNV33
44-Pin TSOP Type II 51-85087
51-85082-*B
51-85087-*A

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Datasheet ID: CY7C1021BNV33L-10ZXC 507892