CY62167EV18LL-55BAXI

CY62167EV18LL-55BAXI Datasheet

CY62167EV18

Part	Datasheet
CY62167EV18LL-55BAXI	CY62167EV18LL-55BAXI (pdf)

PDF Datasheet Preview
CY62167EV18 16 Mbit 1M x 16 Static RAM • Very high speed 55 ns • Wide voltage range 1.65V to 2.25V • Ultra low standby power Typical standby current uA Maximum standby current 12 uA • Ultra low active power Typical active current mA at f = 1 MHz • Easy memory expansion with CE1, CE2, and OE features • Automatic power down when deselected • CMOS for optimum speed and power • Offered in Pb-free 48-ball VFBGA packages Functional Description The CY62167EV18 is a high performance CMOS static RAM organized as 1M words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life in portable applications such as cellular telephones. The device also has an automatic power down feature that reduces power consumption by 99 percent when addresses are not toggling. Place the device into standby mode when deselected CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH . The input and output pins I/O0 through I/O15 are placed in a high impedance state when the device is deselected CE1HIGH or CE2 LOW outputs are disabled OE HIGH both Byte High Enable and Byte Low Enable are disabled BHE, BLE HIGH and a write operation is in progress CE1 LOW, CE2 HIGH and WE LOW . To write to the device, take Chip Enables CE1 LOW and CE2 HIGH and Write Enable WE input LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O0 through I/O7 is written into the location specified on the address pins A0 through A19 . If Byte High Enable BHE is LOW, then data from I/O pins I/O8 through I/O15 is written into the location specified on the address pins A0 through A19 . To read from the device, take Chip Enables CE1 LOW and CE2 HIGH and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If Byte High Enable BHE is LOW, then data from memory appears on I/O8 to I/O15. See the Truth Table on page 9 for a complete description of read and write modes. For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines. Logic Block Diagram A8 A7 A6 DATA IN DRIVERS 1M x 16 RAM ARRAY ROW DECODER A11 A12 A13 A14 A15 A16 AA1187 A19 SENSE AMPS COLUMN DECODER Power Down Circuit CE2 CE1 BHE BLE • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY62167EV18 Pin Configuration Figure 48-Ball VFBGA 6 x 7 x 1mm / 6 x 8 x 1mm Top View [1, 2, 3] 12 34 56 BLE OE A0 A1 A2 CE2 IO8 BHE A3 A4 CE1 IO 0 IO 9 IO 10 A5 A6 IO 1 IO 2 VSS IO11 A17 A7 IO3 Vcc VCC IO 12 NC A16 IO 4 Vss IO 14 IO 13 A14 A15 IO 5 IO 6 IO 15 A19 A12 A13 WE IO 7 A18 A8 A9 A10 A11 NC Product Portfolio Ordering Information Speed ns Ordering Code 55 CY62167EV18LL-55BAXI CY62167EV18LL-55BVI CY62167EV18LL-55BVXI CY62167EV30LL-45BVI [5] Package Diagram Package Type 001-13297 48-ball VFBGA 6 x 7 x 1 mm Pb-free 51-85150 48-ball VFBGA 6 x 8 x 1 mm 48-ball VFBGA 6 x 8 x 1 mm Pb-free 51-85150 48-ball VFBGA 6 x 8 x 1 mm Package Diagram Figure 48-Ball VFBGA 6 x 7 x 1 mm , 001-13297 Operating Range Industrial NOTES ALL DIMENSION ARE IN MM [MAX/MIN] JEDEC REFERENCE MO-216 PACKAGE WEIGHT 0.03g 001-13297-A Page 10 of 13 [+] Feedback CY62167EV18 Package Diagram TOP VIEW Figure 48-Ball VFBGA 6 x 8 x 1 mm , 51-85150 A1 CORNER 12 3 4 5 6 A B C D E F G H BOTTOM VIEW A1 CORNER M C M C A B Ø0.30±0.05 48X 6 54 3 2 1 A B C D E F G H B 0.15 4X C MAX. SEATING PLANE C 51-85150-D MAX. Page 11 of 13 [+] Feedback CY62167EV18 Document History Page Document Title CY62167EV18 16 Mbit 1M x 16 Static RAM Document Number 38-05447 ECN NO. Orig. of Change Submission Description of Change Updated the Ordering Information table 469182 See ECN Minor Change Moved to external web 619122 See ECN Replaced 45 ns speed bin with 55 ns speed bin 1130323 1388287 See ECN See ECN Converted from preliminary to final Added footnote# 8 related ISB2 and ICCDR Changed ISB1 and ISB2 spec from 10 uA to 12 uA Changed ICCDR spec from 8 uA to 10 uA Added footnote# 13 related AC timing parameters Changed tWC spec from 45 ns to 55 ns Changed tSCE, tAW, tPWE, tBW spec from 35 ns to 40 ns Changed tHZWE spec from 18 ns to 20 ns Added 48-Ball VFBGA 6 x 7 x 1mm package Added footnote# 1 related to FBGA package Updated Ordering Information table 1664843 VKN/AESA See ECN Added CY62167EV30LL-45BVI part in the Ordering Information table Added footnote# 5 related to CY62167EV30LL-45BVI part 2675375 VKN/PYRS 03/17/2009 Added CY62167EV18LL-55BVI part in the Ordering Information table Page 12 of 13 [+] Feedback CY62167EV18 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General psoc.cypress.com/solutions Low Power/Low Voltage psoc.cypress.com/low-power Precision Analog psoc.cypress.com/precision-analog LCD Drive psoc.cypress.com/lcd-drive CAN 2.0b psoc.cypress.com/can psoc.cypress.com/usb Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 13 of 13 MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders. [+] Feedback

PDF Datasheet Preview

CY62167EV18
16 Mbit 1M x 16 Static RAM
• Very high speed 55 ns
• Wide voltage range 1.65V to 2.25V
• Ultra low standby power Typical standby current uA Maximum standby current 12 uA
• Ultra low active power Typical active current mA at f = 1 MHz
• Easy memory expansion with CE1, CE2, and OE features
• Automatic power down when deselected
• CMOS for optimum speed and power
• Offered in Pb-free 48-ball VFBGA packages

Functional Description

The CY62167EV18 is a high performance CMOS static RAM organized as 1M words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life in portable applications such as cellular telephones. The device also has an automatic power down feature that reduces power consumption
by 99 percent when addresses are not toggling. Place the device into standby mode when deselected CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH . The input and output pins I/O0 through I/O15 are placed in a high impedance state when the device is deselected CE1HIGH or CE2 LOW outputs are disabled OE HIGH both Byte High Enable and Byte Low Enable are disabled BHE, BLE HIGH and a write operation is in progress CE1 LOW, CE2 HIGH and WE LOW .

To write to the device, take Chip Enables CE1 LOW and CE2 HIGH and Write Enable WE input LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O0 through I/O7 is written into the location specified on the address pins A0 through A19 . If Byte High Enable BHE is LOW, then data from I/O pins I/O8 through I/O15 is written into the location specified on the address pins A0 through A19 .

To read from the device, take Chip Enables CE1 LOW and CE2 HIGH and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If Byte High Enable BHE is LOW, then data from memory appears on I/O8 to I/O15. See the Truth Table on page 9 for a complete description of read and write modes.

For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines.

Logic Block Diagram

A8 A7 A6

DATA IN DRIVERS
1M x 16 RAM ARRAY

ROW DECODER A11 A12 A13 A14 A15 A16 AA1187 A19

SENSE AMPS

COLUMN DECODER

Power Down Circuit

CE2 CE1

BHE BLE
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY62167EV18

Pin Configuration

Figure 48-Ball VFBGA 6 x 7 x 1mm / 6 x 8 x 1mm Top View [1, 2, 3]
12 34 56

BLE OE A0 A1 A2 CE2

IO8 BHE A3 A4 CE1 IO 0

IO 9 IO 10 A5 A6 IO 1 IO 2

VSS IO11 A17 A7

IO3 Vcc

VCC IO 12 NC A16 IO 4 Vss

IO 14 IO 13 A14 A15 IO 5 IO 6

IO 15 A19 A12 A13 WE IO 7

A18 A8 A9 A10 A11 NC

Product Portfolio
Ordering Information

Speed ns
Ordering Code
55 CY62167EV18LL-55BAXI

CY62167EV18LL-55BVI

CY62167EV18LL-55BVXI CY62167EV30LL-45BVI [5]

Package Diagram

Package Type
001-13297 48-ball VFBGA 6 x 7 x 1 mm Pb-free
51-85150 48-ball VFBGA 6 x 8 x 1 mm
48-ball VFBGA 6 x 8 x 1 mm Pb-free
51-85150 48-ball VFBGA 6 x 8 x 1 mm

Package Diagram

Figure 48-Ball VFBGA 6 x 7 x 1 mm , 001-13297

Operating Range

Industrial

NOTES ALL DIMENSION ARE IN MM [MAX/MIN] JEDEC REFERENCE MO-216 PACKAGE WEIGHT 0.03g
001-13297-*A

Page 10 of 13 [+] Feedback

CY62167EV18

Package Diagram

TOP VIEW

Figure 48-Ball VFBGA 6 x 8 x 1 mm , 51-85150

A1 CORNER
12 3 4 5 6

A B C D E F G H

BOTTOM VIEW A1 CORNER

M C M C A B Ø0.30±0.05 48X
6 54 3 2 1

A B C D E F G H

B 0.15 4X

C MAX.

SEATING PLANE C
51-85150-*D

MAX.

Page 11 of 13 [+] Feedback

CY62167EV18

Document History Page

Document Title CY62167EV18 16 Mbit 1M x 16 Static RAM Document Number 38-05447

ECN NO.

Orig. of Change

Submission

Description of Change
Updated the Ordering Information table
469182

See ECN Minor Change Moved to external web
619122

See ECN Replaced 45 ns speed bin with 55 ns speed bin
1130323
1388287

See ECN See ECN

Converted from preliminary to final Added footnote# 8 related ISB2 and ICCDR Changed ISB1 and ISB2 spec from 10 uA to 12 uA Changed ICCDR spec from 8 uA to 10 uA Added footnote# 13 related AC timing parameters Changed tWC spec from 45 ns to 55 ns Changed tSCE, tAW, tPWE, tBW spec from 35 ns to 40 ns Changed tHZWE spec from 18 ns to 20 ns
Added 48-Ball VFBGA 6 x 7 x 1mm package Added footnote# 1 related to FBGA package Updated Ordering Information table
1664843 VKN/AESA See ECN Added CY62167EV30LL-45BVI part in the Ordering Information table

Added footnote# 5 related to CY62167EV30LL-45BVI part
2675375 VKN/PYRS 03/17/2009 Added CY62167EV18LL-55BVI part in the Ordering Information table

Page 12 of 13 [+] Feedback

CY62167EV18

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

PSoC Solutions

General
psoc.cypress.com/solutions

Low Power/Low Voltage
psoc.cypress.com/low-power

Precision Analog
psoc.cypress.com/precision-analog

LCD Drive
psoc.cypress.com/lcd-drive

CAN 2.0b
psoc.cypress.com/can
psoc.cypress.com/usb

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Page 13 of 13

MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders.
[+] Feedback

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Datasheet ID: CY62167EV18LL-55BAXI 507825