CY62126EV30LL-55ZSXE

CY62126EV30LL-55ZSXE Datasheet


CY62126EV30 MoBL

Part Datasheet
CY62126EV30LL-55ZSXE CY62126EV30LL-55ZSXE CY62126EV30LL-55ZSXE (pdf)
Related Parts Information
CY62126EV30LL-45ZSXAT CY62126EV30LL-45ZSXAT CY62126EV30LL-45ZSXAT
CY62126EV30LL-45ZSXI CY62126EV30LL-45ZSXI CY62126EV30LL-45ZSXI
CY62126EV30LL-45BVXI CY62126EV30LL-45BVXI CY62126EV30LL-45BVXI
CY62126EV30LL-45ZSXIT CY62126EV30LL-45ZSXIT CY62126EV30LL-45ZSXIT
CY62126EV30LL-55ZSXET CY62126EV30LL-55ZSXET CY62126EV30LL-55ZSXET
CY62126EV30LL-45BVXIT CY62126EV30LL-45BVXIT CY62126EV30LL-45BVXIT
CY62126EV30LL-45ZSXA CY62126EV30LL-45ZSXA CY62126EV30LL-45ZSXA
CY62126EV30LL-55BVXET CY62126EV30LL-55BVXET CY62126EV30LL-55BVXET
CY62126EV30LL-55BVXE CY62126EV30LL-55BVXE CY62126EV30LL-55BVXE
PDF Datasheet Preview
CY62126EV30 MoBL
1-Mbit 64K x 16 Static RAM
• High speed 45 ns
• Temperature ranges Industrial °C to +85 °C Automotive °C to +125 °C
• Wide voltage range V to V
• Pin compatible with CY62126DV30
• Ultra low standby power Typical standby current 1 Maximum standby current 4
• Ultra low active power Typical active current mA at f = 1 MHz
• Easy memory expansion with CE and OE features
• Automatic power down when deselected
• Complementary metal oxide semiconductor CMOS for optimum speed and power
• Offered in Pb-free 48-ball very fine pitch ball grid array VFBGA and 44-pin thin small outline package TSOP II packages

Functional Description

The CY62126EV30 is a high performance CMOS static RAM organized as 64K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This is ideal for providing More Battery in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling. Placing the device in standby mode reduces power consumption by more than 99 percent when deselected CE HIGH . The input and output pins I/O0 through I/O15 are placed in a high impedance state when the device is deselected CE HIGH , the outputs are disabled OE HIGH , both Byte High Enable and Byte Low Enable are disabled BHE, BLE HIGH or during a write operation CE LOW and WE LOW .

To write to the device, take Chip Enable CE and Write Enable WE inputs LOW. If Byte Low Enable BLE is LOW, then data from I/O pins I/O0 through I/O7 is written into the location specified on the address pins A0 through A15 . If Byte High Enable BHE is LOW, then data from I/O pins I/O8 through I/O15 is written into the location specified on the address pins A0 through A15 .

To read from the device, take Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH. If Byte Low Enable BLE is LOW, then data from the memory location specified by the address pins appear on I/O0 to I/O7. If Byte High Enable BHE is LOW, then data from memory appears on I/O8 to I/O15. See the “Truth Table” on page 11 for a complete description of read and write modes.

For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines.

Logic Block Diagram

A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

DATA IN DRIVERS 64K x 16 RAM Array

COLUMN DECODER

ROW DECODER A11 A12 A13 A14 A15

SENSE AMPS

BHE WE CE OE BLE
• San Jose, CA 95134-1709
• 408-943-2600

CY62126EV30 MoBL

Contents

Pin Configuration 3 Maximum 4 Operating 4 Electrical 4 Capacitance 5 Thermal 5 Data Retention Characteristics 6 Switching 7 Switching Waveforms 8 Truth Table 11
Ordering 12 Ordering Code Definitions 12

Package 13 Acronyms 14 Document History Page 15 Sales, Solutions, and Legal Information 16

Worldwide Sales and Design Support....................... 16 Products 16 PSoC Solutions 16

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CY62126EV30 MoBL

Pin Configuration

Figure 48-Ball VFBGA Top View

BLE OE A0 A1 A2 NC

I/O8 BHE A3 A4 CE I/O0

I/O9 I/O10 A5 A6 I/O1 I/O2

VSS I/O11 NC A7 I/O3 Vcc

VCC I/O12 NC I/O4 Vss

I/O14 I/O13 A14 A15 I/O5 I/O6

I/O15 NC A12 A13 WE I/O7

NC A8 A9 A10 A11 NC

Figure 44-Pin TSOP II Top View [1]

A3 2 A2 3 A1 4 A0 5

I/O0 7 I/O1 8

I/O2 9 I/O3 10 VCC 11 VSS 12 I/O4 13 I/O5 14 I/O6 15 I/O7 16

WE 17

A15 18 A14 19 A13 20 A12 21 NC 22
44 A5 43 A6 42 A7
41 OE
40 BHE
39 BLE
38 I/O15 37 I/O14 36 I/O13 35 I/O12 34 VSS 33 VCC 32 I/O11 31 I/O10 30 I/O9 29 I/O8 28 NC 27 A8 26 A9 25 A10 24 A11 23 NC

Table Product Portfolio

Product

Range

CY62126EV30LL Industrial CY62126EV30LL Automotive

VCC Range V

Typ[2]

Speed ns
45 55

Power Dissipation

Operating, ICC mA
f = 1 MHz
f = fmax

Typ[2] Max Typ[2] Max

Standby, ISB2

Typ[2]
Ordering Information

Speed ns
Ordering Code

Package Diagram

Package Type
45 CY62126EV30LL-45BVXI 51-85150 48-ball VFBGA Pb-free

CY62126EV30LL-45ZSXI 51-85087 44-pin TSOP II Pb-free

CY62126EV30LL-45ZSXA 51-85087 44-pin TSOP II Pb-free
55 CY62126EV30LL-55BVXE 51-85150 48-ball VFBGA Pb-free

CY62126EV30LL-55ZSXE 51-85087 44-pin TSOP II Pb-free

Contact your local Cypress sales representative for availability of other parts.
Ordering Code Definitions

CY 621 2 6 E V30 LL 45/55 XXX X

Temperature Grades I = Industrial A = Auto-A E = Auto-E Package type BVX VFBGA Pb-free ZSX TSOP II Pb-free Speed grade Low Power Voltage Range = 3 V Typical

E = Process Technology 90 nm

Bus Width = x16 Density = 1 Mbit
621 = MoBL SRAM Family

Company ID CY = Cypress

Operating Range

Industrial Automotive-A Automotive-E Automotive-E

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Package Diagrams

CY62126EV30 MoBL

Figure 48-Ball VFBGA 6 x 8 x 1 mm , 51-85150
51-85150 *F

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CY62126EV30 MoBL

Figure 44-Pin TSOP II, 51-85087

PIN 1 I.D.

TOP VIEW

DIMENSION IN MM INCH MAX MIN.

BASE PLANE

SEATING PLANE

Acronyms

Acronym BHE BLE CMOS CE I/O OE SRAM TSOP VFBGA WE

Description byte high enable byte low enable complementary metal oxide semiconductor chip enable input/output enable static random access memory thin small outline package very fine ball gird array write enable

BOTTOM VIEW

ZZZ ZXZ

EJECTOR MARK OPTIONAL

CAN BE LOCATED ANYWHERE IN THE BOTTOM PKG
0°-5°
51-85087-*C

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CY62126EV30 MoBL

Document History Page

Document Title CY62126EV30 1-Mbit 64K x 16 Static RAM Document Number 38-05486

ECN No.

Submission Date

Orig. of Change

Description of Change
** 202760 See ECN

AJU New data sheet
Converted from Preliminary to Final Removed 35 ns Speed Bin Removed “L” version of CY62126EV30 Changed ICC Typ from 8 mA to 11 mA and ICC max from 12 mA to 16 mA for f = fmax Changed ICC max from mA to mA for f = 1 MHz, ISB1, ISB2 max from 1 to 4 ISB1, ISB2 Typ from to 1 ICCDR max from to 3 AC Test load Capacitance value from 50 pF to 30 pF, tLZOE from 3 to 5 ns, tLZCE from 6 to 10 ns, tHZCE from 22 to 18 ns, tLZBE from 6 to 5 ns, tPWE from 30 to 35 ns, tSD from 22 to 25 ns, tLZWE from 6 to 10 ns, and updated the Ordering Information table.

Added footnote #7 related to ISB2 and ICCDR Added footnote #11 related AC timing parameters
*D 1045260 See ECN
Added Automotive information Updated Ordering Information table
*E 2631771 01/07/09 NXR/PYRS Changed CE condition from X to L in Truth table for Output Disable mode Updated template
*F 2944332 06/04/2010

Added Contents Removed byte enable from footnote #2 in Electrical Characteristics Added footnote related to chip enable in Truth Table Updated Package Diagrams Updated links in Sales, Solutions, and Legal Information
*G 2996166 07/29/2010
AJU Added CY62126EV30LL-45ZSXA part in Ordering Information. Added Ordering Code Definitions. Modified table footnote format.
*H 3113864 12/17/2010 PRAS Updated Figure 1 and Package Diagram, and fixed Typo in Figure

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CY62126EV30 MoBL

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations.

Products Automotive Clocks & Buffers Interface Lighting & Power Control

Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF
cypress.com/go/automotive cypress.com/go/clocks
cypress.com/go/interface cypress.com/go/powerpsoc
cypress.com/go/plc cypress.com/go/memory
cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB
cypress.com/go/wireless

PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

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MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor. All products and company names mentioned in this document may be the trademarks of their respective holders.
More datasheets: B32529C0562K189 | B32529C0562K000 | QT115A-ISG | FQPF3N90 | FQPF3N90_NL | 17801-KIT | CY62126EV30LL-45ZSXAT | CY62126EV30LL-45ZSXI | CY62126EV30LL-45BVXI | CY62126EV30LL-45ZSXIT


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Datasheet ID: CY62126EV30LL-55ZSXE 507802