CY2XP21ZXI

CY2XP21ZXI Datasheet

CY2XP21

Part	Datasheet
CY2XP21ZXI	CY2XP21ZXI (pdf)

Related Parts	Information
CY2XP21ZXCT	CY2XP21ZXCT
CY2XP21ZXIT	CY2XP21ZXIT

PDF Datasheet Preview
CY2XP21 125 MHz LVPECL Clock Generator • One LVPECL Output Pair • Output Frequency 112 MHz to 140 MHz • External Crystal Frequency MHz to 28 MHz • Low RMS Phase Jitter at 125 MHz, using 25 MHz Crystal MHz to 20 MHz ps Typical • Pb-free 8-Pin TSSOP Package • Supply Voltage 3.3V or 2.5V • Commercial and Industrial Temperature Ranges Logic Block Diagram Functional Description The CY2XP21 is a PLL Phase Locked Loop based high performance clock generator. It is optimized to generate a 125 MHz clock, which is ideal for 10 Gb Ethernet applications. It also produces an output frequency that is five times the crystal frequency. It uses Cypress’s low noise VCO technology to achieve less than 1 ps typical RMS phase jitter. The CY2XP21 has a crystal oscillator interface input and one LVPECL output pair. E xt ernal Cryst al CR YS TAL OSCILLATOR X OU T LOW -N OISE PLL OUTPU T D IV IDE R CLK# Pinouts Figure Pin Diagram - 8-Pin TSSOP VDD 1 VSS 2 XOUT 3 XIN 4 CLK# Table Pin Definition - 8-Pin TSSOP Pin Number Pin Name XOUT, XIN I/O Type Power XTAL output and input CLK#, CLK LVPECL output Description 3.3V or 2.5V power supply Ground Parallel resonant crystal interface No Connect Differential clock output • San Jose, CA 95134-1709 • 408-943-2600 [+] Feedback CY2XP21 Frequency Table Crystal Frequency MHz 25 Inputs PLL Multiplier Value 5 Output Frequency MHz 125 133 Absolute Maximum Conditions Parameter VDD VIN[1] TS TJ ESDHBM ΘJA[2] Supply Voltage Input Voltage, DC Temperature, Storage Temperature, Junction ESD Protection, Human Body Model Flammability Rating Thermal Resistance, Junction to Ambient Conditions Relative to VSS Non operating JEDEC STD 22-A114-B At 1/8 in. 0 m/s airflow 1 m/s airflow m/s airflow VDD + 150 Ordering Information Part Number CY2XP21ZXC CY2XP21ZXCT CY2XP21ZXI CY2XP21ZXIT Package Type 8-pin TSSOP 8-pin TSSOP - Tape and Reel 8-pin TSSOP 8-pin TSSOP - Tape and Reel Product Flow Commercial, 0°C to 70°C Commercial, 0°C to 70°C Industrial, -40°C to 85°C Industrial, -40°C to 85°C Package Drawing and Dimensions Figure 8-Pin Thin Shrunk Small Outline Package MM Body Z8 PIN 1 ID DIMENSIONS IN MM[INCHES] MIN. MAX. BSC. MAX. SEATING PLANE GAUGE PLANE 0° -8° 51-85093-*A Page 6 of 7 [+] Feedback CY2XP21 Document History Page Document Title CY2XP21 125 MHz LVPECL Clock Generator Document Number 001-52849 ECN NO. Submission Date Orig. of Change Description of Change 2700242 04/30/09 KVM/PYRS New data sheet 2718898 06/15/09 WWZ Minor ECN to post data sheet to external web 2767298 09/22/09 Add IDD spec for unterminated outputs Change parameter name for IDD terminated outputs from IDD to IDDT Remove IDD footnote about externally dissipated current Add footnote reference to CINX:not 100% tested Add max limit for TR, TF ns Change TLOCK max from 10 ms to 5 ms Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. All products and company names mentioned in this document may be the trademarks of their respective holders. Page 7 of 7 [+] Feedback

PDF Datasheet Preview

CY2XP21
125 MHz LVPECL Clock Generator
• One LVPECL Output Pair
• Output Frequency 112 MHz to 140 MHz
• External Crystal Frequency MHz to 28 MHz
• Low RMS Phase Jitter at 125 MHz, using 25 MHz Crystal

MHz to 20 MHz ps Typical
• Pb-free 8-Pin TSSOP Package
• Supply Voltage 3.3V or 2.5V
• Commercial and Industrial Temperature Ranges

Logic Block Diagram

Functional Description

The CY2XP21 is a PLL Phase Locked Loop based high performance clock generator. It is optimized to generate a 125 MHz clock, which is ideal for 10 Gb Ethernet applications. It also produces an output frequency that is five times the crystal frequency. It uses Cypress’s low noise VCO technology to achieve less than 1 ps typical RMS phase jitter. The CY2XP21 has a crystal oscillator interface input and one LVPECL output pair.

E xt ernal Cryst al

CR YS TAL OSCILLATOR

X OU T

LOW -N OISE PLL

OUTPU T D IV IDE R

CLK#

Pinouts

Figure Pin Diagram - 8-Pin TSSOP

VDD 1 VSS 2 XOUT 3 XIN 4

CLK#

Table Pin Definition - 8-Pin TSSOP

Pin Number Pin Name

XOUT, XIN

I/O Type Power XTAL output and input

CLK#, CLK

LVPECL output

Description 3.3V or 2.5V power supply Ground Parallel resonant crystal interface No Connect Differential clock output
• San Jose, CA 95134-1709
• 408-943-2600
[+] Feedback

CY2XP21

Frequency Table

Crystal Frequency MHz 25

Inputs

PLL Multiplier Value 5

Output Frequency MHz
125 133

Absolute Maximum Conditions

Parameter

VDD VIN[1] TS TJ ESDHBM ΘJA[2]

Supply Voltage Input Voltage, DC Temperature, Storage Temperature, Junction ESD Protection, Human Body Model Flammability Rating Thermal Resistance, Junction to Ambient

Conditions

Relative to VSS Non operating

JEDEC STD 22-A114-B At 1/8 in. 0 m/s airflow 1 m/s airflow m/s airflow

VDD + 150
Ordering Information

Part Number CY2XP21ZXC CY2XP21ZXCT CY2XP21ZXI CY2XP21ZXIT

Package Type 8-pin TSSOP 8-pin TSSOP - Tape and Reel 8-pin TSSOP 8-pin TSSOP - Tape and Reel

Product Flow Commercial, 0°C to 70°C Commercial, 0°C to 70°C Industrial, -40°C to 85°C Industrial, -40°C to 85°C

Package Drawing and Dimensions

Figure 8-Pin Thin Shrunk Small Outline Package MM Body Z8

PIN 1 ID

DIMENSIONS IN MM[INCHES] MIN. MAX.

BSC.

MAX.

SEATING PLANE

GAUGE PLANE
0° -8°
51-85093-*A

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CY2XP21

Document History Page

Document Title CY2XP21 125 MHz LVPECL Clock Generator Document Number 001-52849

ECN NO.

Submission Date

Orig. of Change

Description of Change
2700242 04/30/09 KVM/PYRS New data sheet
2718898 06/15/09

WWZ Minor ECN to post data sheet to external web
2767298 09/22/09

Add IDD spec for unterminated outputs Change parameter name for IDD terminated outputs from IDD to IDDT Remove IDD footnote about externally dissipated current Add footnote reference to CINX:not 100% tested Add max limit for TR, TF ns Change TLOCK max from 10 ms to 5 ms

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products PSoC Clocks & Buffers Wireless Memories Image Sensors
psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

All products and company names mentioned in this document may be the trademarks of their respective holders.

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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY2XP21ZXI Datasheet file may be downloaded here without warranties.

Datasheet ID: CY2XP21ZXI 507762