CY28RS480
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CY28RS480OXCT (pdf) |
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CY28RS480ZXC |
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CY28RS480OXC |
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CY28RS480ZXCT |
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CY28RS480 Clock Generator for RS480 Chipset • Supports CPU • 200-MHz differential CPU clock pairs • 100-MHz differential SRC clocks • 48-MHz USB clock • 33-MHz PCI clock • 66-MHz clock Block Diagram XIN XOUT CPU_STP# CLKREQ[0:1]# XTAL OSC PLL Ref Freq PLL1 Divider Network IREF PD PLL2 SDATA SCLK I2C Logic • I2C support with readback capabilities • Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference EMI reduction • 3.3V power supply • 56-pin SSOP and TSSOP packages CPU SRC HTT66 PCI REF USB_48 Pin Configuration VDD_REF REF[0:2] VDD_CPU CPUT[0:1], CPUC[0:1], VDD_SRC SRCT[0:5],SRCC[0:5] VDD_SRCS SRCST[0:1],SRCSC[0:1] VDD_PCI PCI VDD_HTT HTT66 VDD_48 MHz USB_48 XIN XOUT VDD_48 USB_48 VSS_48 NC SCLK SDATA NC CLKREQ#0 CLKREQ#1 SRCT5 SRCC5 VDD_SRC VSS_SRC SRCT4 SRCC4 SRCT3 SRCC3 VSS_SRC VDD_SRC SRCT2 SRCC2 SRCT1 SRCC1 VSS_SRC SRCST1 SRCSC1 CY28RS480 56 SSOP/TSSOP VDD_REF VSS_REF REF0 REF1 REF2 VDD_PCI PCI0 VSS_PCI VDD_HTT HTT66 VSS_HTT CPUT0 CPUC0 VDD_CPU VSS_CPU CPUT1 CPUC1 VDDA VSSA IREF VSS_SRC1 VDD_SRC1 SRCT0 SRCC0 VDD_SRCS VSS_SRCS SRCST0 SRCSC0 Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 [+] Feedback CY28RS480 Pin Description Pin No. 41,40,45,44 50 37 Name CPUT/C PCI0 IREF 52, 53, 54 7 REF[2:0] SCLK SDATA Ordering Information Part Number Lead-free CY28RS480OXC CY28RS480OXCT CY28RS480ZXC CY28RS480ZXCT Package Type 56-pin SSOP 56-pin SSOP Tape and Reel 56-pin TSSOP 56-pin TSSOP Tape and Reel Package Drawing and Dimensions 56-Lead Shrunk Small Outline Package O56 Product Flow Commercial, 0° to 70°C Commercial, 0° to 70°C Commercial, 0° to 70°C Commercial, 0° to 70°C DIMENSIONS IN INCHES MIN. MAX. SEATING PLANE GAUGE PLANE 0° -8° 51-85062-*C Page 13 of 15 [+] Feedback CY28RS480 Package Drawing and Dimensions continued 56-Lead Thin Shrunk Small Outline Package, Type II 6 mm x 12 mm Z56 DIMENSIONS IN MM[INCHES] MIN. REFERENCE JEDEC MO-153 PACKAGE WEIGHT 0.42gms PART # Z5624 STANDARD PKG. ZZ5624 LEAD FREE PKG. MAX. MAX. GAUGE PLANE SEATING PLANE 0° -8° 51-85060-*C Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. ATI is a registered trademark of ATI Technologies Inc. HyperTransport is a trademark of the HyperTransport Technology Consortium. Intel and Pentium are registered trademarks of Intel Corporation. AMD is a registered trademark of Advanced Micro Devices, Inc. All product and company names mentioned in this document are the trademarks of their respective holders. Page 14 of 15 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] Feedback CY28RS480 Document History Page Document Title CY28RS480 Clock Generator for RS480 Chipset Document Number 38-07638 Orig. of ECN NO. Issue Date Change Description of Change 325360 See ECN RGL Fixed the ordering information table to match the parts in the DevMaster Page 15 of 15 [+] Feedback |
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