CY28411ZXC
CY28411ZXC Datasheet
CY28411
| Part | Datasheet |
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CY28411ZXC |
CY28411ZXC (pdf) |
| Related Parts | Information |
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CY28411ZXCT |
CY28411ZXCT |
| PDF Datasheet Preview |
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| • Compliant to CK410M • Supports Intel Pentium-M CPU • Selectable CPU frequencies • Differential CPU clock pairs • 100-MHz differential SRC clocks • 96-MHz differential dot clock • 48-MHz USB clocks CY28411 Clock Generator for Alviso Chipset • 33-MHz PCI clock • Low-voltage frequency select input • I2C support with readback capabilities • Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference EMI reduction • 3.3V power supply • 56-pin SSOP and TSSOP packages x2 / x3 x7 / x8 REF x1 DOT96 x1 USB_48 x1 Block Diagram XIN XOUT CPU_STP# PCI_STP# FS_[C:A] VTT_PWRGD# IREF XTAL OSC PLL Ref Freq PLL1 Divider Network PD PLL2 SDATA SCLK I2C Logic Pin Configuration VDD_REF REF VDD_PCI VSS_PCI VDD_CPU CPUT[0:1], CPUC[0:1], CPU T/C 2_ITP] VDD_SRC SRCT[0:6], SRCC[0:6] PCI3 PCI4 PCI5 VSS_PCI VDD_PCI PCIF0/ITP_EN PCIF1 VDD_PCI PCI[2:5] VTT_PWRGD#/PD VDD_48 VDD_PCIF PCIF[0:1] USB_48/FS_A VSS_48 DOT96T VDD_48 MHz DOT96C FS_B/TEST_MODE DOT96T DOT96C USB_48 SRCT0 SRCC0 SRCT1 Ordering Information Part Number Standard CY28411OC CY28411OCT CY28411ZC CY28411ZCT Lead-free Planned CY28411OXC CY28411OXCT CY28411ZXC CY28411ZXCT Package Type 56-pin SSOP 56-pin SSOP Tape and Reel 56-pin TSSOP 56-pin TSSOP Tape and Reel 56-pin SSOP 56-pin SSOP Tape and Reel 56-pin TSSOP 56-pin TSSOP Tape and Reel Product Flow Commercial, 0° to 85°C Commercial, 0° to 85°C Commercial, 0° to 85°C Commercial, 0° to 85°C Commercial, 0° to 85°C Commercial, 0° to 85°C Commercial, 0° to 85°C Commercial, 0° to 85°C Page 17 of 19 [+] Feedback Package Diagrams CY28411 56-Lead Shrunk Small Outline Package O56 DIMENSIONS IN INCHES MIN. MAX. SEATING PLANE GAUGE PLANE 0° -8° 51-85062-*C 56-Lead Thin Shrunk Small Outline Package, Type II 6 mm x 12 mm Z56 DIMENSIONS IN MM[INCHES] MIN. REFERENCE JEDEC MO-153 PACKAGE WEIGHT 0.42gms PART # Z5624 STANDARD PKG. ZZ5624 LEAD FREE PKG. MAX. MAX. GAUGE PLANE SEATING PLANE 0° -8° 51-85060-*C Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. Intel and Pentium are registered trademarks of Intel Corporation. All product and company names mentioned in this document are the trademarks of their respective holders. Page 18 of 19 [+] Feedback CY28411 Document History Page Document Title CY28411 Clock Generator for Alviso Chipset Document Number 38-07594 Orig. of ECN NO. Issue Date Change Description of Change 130205 12/24/03 RGL New Data Sheet 207715 See ECN RGL Corrected the frequency select table Corrected the VIH_FS and VIL_FS specs in the DC Electrical specs Fixed the Single-ended Load Configuration diagram Figure 8 Changed the Product Flow from 0 to 70° to 0 to 85° Corrected the Ordering Information entry for the PB free to match the Devmaster Corrected the ECN no. from 38-075954 to 130205 229428 See ECN RGL Change the Long Term Accuracy spec in the 96MHz DOT clock from 300ppm to 100ppm Removed all references to CPU Frequencies 166MHz Fixed the single-ended load configuration diagram Page 19 of 19 [+] Feedback |
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