CY28410OXCT

CY28410OXCT Datasheet


CY28410

Part Datasheet
CY28410OXCT CY28410OXCT CY28410OXCT (pdf)
Related Parts Information
CY28410ZXC CY28410ZXC CY28410ZXC
CY28410OXC CY28410OXC CY28410OXC
CY28410ZXCT CY28410ZXCT CY28410ZXCT
PDF Datasheet Preview
CY28410

Clock Generator for Grantsdale Chipset
• Compliant with CK410
• Supports Intel P4 and Tejas CPU
• Selectable CPU frequencies
• Differential CPU clock pairs
• 100-MHz differential SRC clocks
• 96-MHz differential dot clock
• 48-MHz USB clocks
• 33-MHz PCI clock
• Low-voltage frequency select input
• I2C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference EMI reduction
• 3.3V power supply
• 56-pin SSOP and TSSOP packages

DOT96 USB_48
x2 / x3
x6 / x7

Block Diagram

XIN XOUT

FS_[C:A] VTT_PWRGD#

IREF

XTAL OSC

PLL Ref Freq

PLL1

Divider Network

PD PLL2

SDATA SCLK

I2C Logic

Pin Configuration

VDD_REF REF

VDD_PCI VSS_PCI

VDD_CPU

CPUT[0:1], CPUC[0:1], CPU T/C 2_ITP] VDD_SRC

SRCT[1:6], SRCC[1:6]

PCI3 PCI4 PCI5 VSS_PCI VDD_PCI

PCIF0/ITP_EN

PCIF1

VDD_PCI PCI[0:5]

PCIF2 VDD_48

VDD_PCIF

USB_48

PCIF[0:2]

VSS_48

DOT96T

VDD_48 MHz

DOT96C

FS_B/TEST_MODE
Ordering Information

Part Number Standard CY28410OC CY28410OCT CY28410ZC CY28410ZCT Lead-free Planned CY28410OXC CY28410OXCT CY28410ZXC CY28410ZXCT

Package Type
56-pin SSOP 56-pin SSOP Tape and Reel 56-pin TSSOP 56-pin TSSOP Tape and Reel
56-pin SSOP 56-pin SSOP Tape and Reel 56-pin TSSOP 56-pin TSSOP Tape and Reel

CY28410

Product Flow

Commercial, 0° to 70°C Commercial, 0° to 70°C Commercial, 0° to 70°C Commercial, 0° to 70°C

Commercial, 0° to 70°C Commercial, 0° to 70°C Commercial, 0° to 70°C Commercial, 0° to 70°C

Page 16 of 18

Package Drawing and Dimensions
56-lead Shrunk Small Outline Package O56

CY28410
51-85062-*C
56-Lead Thin Shrunk Small Outline Package, Type II 6 mm x 12 mm Z56

DIMENSIONS IN MM[INCHES] MIN.

REFERENCE JEDEC MO-153 PACKAGE WEIGHT 0.42gms

PART # Z5624 STANDARD PKG. ZZ5624 LEAD FREE PKG.

MAX.

MAX.

GAUGE PLANE

SEATING PLANE
0° -8°
51-85060-*C

Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. Intel and Pentium are registered trademarks of Intel Corporation. All product and company names mentioned in this document are the trademarks of their respective holders.

Page 17 of 18

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

CY28410

Document History Page

Document Title CY28410 Clock Generator for Grantsdale Chipset Document Number 38-07593

Orig. of ECN NO. Issue Date Change

Description of Change
130204 12/24/03

RGL New Data Sheet
207740 See ECN RGL Corrected the frequency select table

Corrected the VIH_FS and VIL_FS specs in the DC Electrical specs Fixed the Single-ended Load Configuration diagram Figure 8

Corrected the ECN no. from 38-07595 to 130204
Corrected the Ordering Information entry for the PB free to match the

Devmaster
229399 See ECN RGL Change the Long Term Accuracy spec in the 96MHz DOT clock from 300ppm
to 100ppm

Fixed the Single-ended Load Configuration

Fixed the AC table based on new char result

Removed all references to 166/333 and 400MHz CPU frequencies
270664 See ECN RGL Corrected a typo in the ordering information

Page 18 of 18
More datasheets: U2796B-MFPG3 | ADZS-BFFPGA-EZEXT | ATA6662-TAQY 19 | 6788 | 74LVTH16652MEA | 74LVTH16652MTDX | 74LVTH16652MTD | 74LVTH16652MEAX | CY28410ZXC | CY28410OXC


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CY28410OXCT Datasheet file may be downloaded here without warranties.

Datasheet ID: CY28410OXCT 507726