CY2318ANZPVXC-11

CY2318ANZPVXC-11 Datasheet


CY2318ANZ

Part Datasheet
CY2318ANZPVXC-11 CY2318ANZPVXC-11 CY2318ANZPVXC-11 (pdf)
Related Parts Information
CY2318ANZPVXC-11T CY2318ANZPVXC-11T CY2318ANZPVXC-11T
CY2318ANZPVC-11 CY2318ANZPVC-11 CY2318ANZPVC-11
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• One input to 18 output buffer/driver
• Supports up to four SDRAM DIMMs
• Two additional outputs for feedback
• Serial interface for individual output control
• 150ps typical output-output skew
• Up to 100 MHz operation
• Dedicated OE pin for testing
• Space-saving 48-pin SSOP package
• 3.3V operation

CY2318ANZ
18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs

Functional Description

The CY2318ANZ is a 3.3V buffer designed to distribute high-speed clocks in PC applications. The part has 18 outputs, 16 of which can be used to drive up to four SDRAM DIMMs, and the remaining can be used for external feedback to a PLL. The device operates at 3.3V and outputs can run up to 100 MHz, thus making it compatible with Pentium processors. The CY2318ANZ can be used in conjunction with the CY2280, CY2281, CY2282 or similar clock synthesizer for a complete Pentium II motherboard solution.

The CY2318ANZ also includes a serial interface which can enable or disable each output clock. On power-up, all output clocks are enabled internal pull up . A separate Output Enable pin facilitates testing on ATE.

Block Diagram

BUF_IN

SDATA SCLOCK

Serial Interface Decoding

SDRAM0

SDRAM1 SDRAM2 SDRAM3

SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8

SDRAM9 SDRAM10 SDRAM11

SDRAM12 SDRAM13 SDRAM14 SDRAM15 SDRAM16 SDRAM17

Pin Configuration

VDD SDRAM0

SDRAM1 VSS VDD

SDRAM2

SDRAM3 VSS

BUF_IN

VDD SDRAM4 SDRAM5

VSS VDD SDRAM6

SDRAM7

VSS VDD SDRAM16 VSS VDDIIC SDATA

SSOP Top View

VDD SDRAM15

SDRAM14 VSS VDD SDRAM13

SDRAM12

VSS OE

VDD SDRAM11 SDRAM10

VSS VDD SDRAM9

SDRAM8

VSS VDD SDRAM17 VSS VSSIIC SCLOCK

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose, CA 95134
• 408-943-2600
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CY2318ANZ

Pin Summary

Name

Pins

VDD VSS VDDIIC VSSIIC BUF_IN OE SDATA SCLK
Ordering Information
Ordering Code Lead-free

CY2318ANZ
+3.3V

BUF_IN

VDDIIC
µF µF

SDRAM[0:17]

Rs Ct

SDRAM[0:17]

SDATA SCLK

VssIIC Vss

CY2318ANZ 48-pin SSOP

Rs = Series termination resistor Ct = Optional cap to reduce EMI

Package Type 48-pin SSOP 48-pin SSOP - Tape and Reel
48-pin SSOP 48-pin SSOP- Tape and Reel

Operating Range

Commercial

Commercial

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Package Diagram
48-Lead Shrunk Small Outline Package O48

CY2318ANZ
51-85061-*C

Pentium II is a registered trademark of Intel Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders.

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Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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CY2318ANZ

Document History Page

Document Title CY2318ANZ 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs Document Number 38-07181

Issue Date

Orig. of Change

Description of Change
111857 12/09/01

DSG Change from Spec number 38-00771 to 38-07181
121833 12/14/02

RBI Power up requirements added to Operating Conditions Information
399949 See ECN RGL Minor Change Corrected the ordering code for the lead-free devices to match
the devmaster

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Datasheet ID: CY2318ANZPVXC-11 507689