CY2313ANZSXC-1

CY2313ANZSXC-1 Datasheet

1CY2310NZCY2310 NZCY2313ANZ

Part	Datasheet
CY2313ANZSXC-1	CY2313ANZSXC-1 (pdf)

Related Parts	Information
CY2313ANZSXC-1T	CY2313ANZSXC-1T
CY2313ANZSC-1	CY2313ANZSC-1

PDF Datasheet Preview
1CY2310NZCY2310 NZCY2313ANZ • One input to 13 output buffer/driver • Supports up to three SDRAM DIMMs • One additional outputs for feedback • Serial interface for output control • Low skew outputs • Up to 100-MHz operation • Multiple VDD and VSS pins for noise reduction • Low EMI outputs • 28-pin SOIC 300-mil package • 3.3V operation Block Diagram CY2313ANZ 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs Functional Description The CY2313ANZ is a 3.3V buffer designed to distribute high-speed clocks in desktop PC applications. The part has 13 outputs, 12 of which can be used to drive up to three SDRAM DIMMs, and the remaining can be used for external feedback to a PLL. The device operates at 3.3V and outputs can run up to 100 MHz, thus making it compatible with II processors. The CY2313ANZ can be used in conjunction with the CY2280, CY2281, CY2282 or similar clock synthesizer for a complete Pentium II motherboard solution. The CY2313ANZ also includes a serial interface which can enable or disable each output clock. On power-up, all output clocks are enabled. Pin Configuration BUF_IN SDATA SCLOCK Serial Interface Decoding SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 SDRAM12 VDD SDRAM0 SDRAM1 VSS VDD SDRAM2 SDRAM3 VSS BUF_IN SDRAM4 SDRAM5 SDRAM12 VDDIIC SDATA 28 SOIC Top View VDD SDRAM11 SDRAM10 VSS VDD SDRAM9 SDRAM8 VSS VDD SDRAM7 SDRAM6 VSS VSSIIC SCLK Pentium is a registered trademark of Intel Corporation. Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 CY2313ANZ Pin Summary Name VDD VSS VDDIIC VSSIIC BUF_IN SDATA SCLK SDRAM [0-12] Pins 1, 5, 20, 24, 28 4, 8, 17, 21, 25 13 16 9 14 15 2, 3, 6, 7, 10, 11, 12, 18, 19, 22, 23, 26, 27 Description 3.3V Digital voltage supply Ground Serial interface voltage supply Ground for serial interface Input clock Serial data input, internal pull-up to VDD Serial clock input, internal pull-up to VDD SDRAM clock outputs Serial Configuration Map • The Serial bits will be read by the clock driver in the following order Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0 Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0 Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0 • Reserved and unused bits should be programmed to “0” • Serial interface address for the CY2313ANZ is: A6 A5 A4 A3 A2 A1 A0 R/W 1 ---- Byte 0:SDRAM Active/Inactive Register 1 = Enable, 0 = Disable , Default = Enabled Bit Pin # Bit 7 11 SDRAM5 Active/Inactive Ordering Information Ordering Code Pb-free Package Name Package Type 28-Pin SOIC Operating Range Commercial 28-Pin SOIC Commercial 28-Pin SOIC Tape and Reel Commercial Page 6 of 8 Package Diagram 28-Lead 300-Mil Molded SOIC S21 CY2313ANZ Page 7 of 8 Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY2313ANZ Document History Page Document Title CY2313ANZ 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs Document Number 38-07144 ECN NO. Issue Date Orig. of Change Description of Change 110253 11/18/01 DSG Change from Spec number 38-00692 to 38-07144 121831 12/14/02 RBI Power up requirements added to Operating Conditions Information 1244583 See ECN DPF Added Pb-free part numbers in the Ordering Information Page 8 of 8

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1CY2310NZCY2310 NZCY2313ANZ
• One input to 13 output buffer/driver
• Supports up to three SDRAM DIMMs
• One additional outputs for feedback
• Serial interface for output control
• Low skew outputs
• Up to 100-MHz operation
• Multiple VDD and VSS pins for noise reduction
• Low EMI outputs
• 28-pin SOIC 300-mil package
• 3.3V operation

Block Diagram

CY2313ANZ
13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs

Functional Description

The CY2313ANZ is a 3.3V buffer designed to distribute high-speed clocks in desktop PC applications. The part has 13 outputs, 12 of which can be used to drive up to three SDRAM DIMMs, and the remaining can be used for external feedback to a PLL. The device operates at 3.3V and outputs can run up to 100 MHz, thus making it compatible with II processors. The CY2313ANZ can be used in conjunction with the CY2280, CY2281, CY2282 or similar clock synthesizer for a complete Pentium II motherboard solution. The CY2313ANZ also includes a serial interface which can enable or disable each output clock. On power-up, all output clocks are enabled.

Pin Configuration

BUF_IN SDATA

SCLOCK

Serial Interface Decoding

SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 SDRAM12

VDD SDRAM0 SDRAM1

VSS VDD SDRAM2

SDRAM3 VSS

BUF_IN SDRAM4 SDRAM5

SDRAM12 VDDIIC

SDATA
28 SOIC Top View

VDD SDRAM11

SDRAM10

VSS VDD SDRAM9

SDRAM8

VSS VDD SDRAM7

SDRAM6

VSS VSSIIC SCLK

Pentium is a registered trademark of Intel Corporation.

Cypress Semiconductor Corporation
• 3901 North First Street
• San Jose
• CA 95134
• 408-943-2600

CY2313ANZ

Pin Summary

Name VDD VSS VDDIIC VSSIIC BUF_IN SDATA SCLK SDRAM [0-12]

Pins 1, 5, 20, 24, 28 4, 8, 17, 21, 25 13 16 9 14 15 2, 3, 6, 7, 10, 11, 12, 18, 19, 22, 23, 26, 27

Description 3.3V Digital voltage supply Ground Serial interface voltage supply Ground for serial interface Input clock Serial data input, internal pull-up to VDD Serial clock input, internal pull-up to VDD SDRAM clock outputs

Serial Configuration Map
• The Serial bits will be read by the clock driver in the following order Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0 Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0 Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Reserved and unused bits should be programmed to “0”
• Serial interface address for the CY2313ANZ is:

A6 A5 A4 A3 A2 A1 A0 R/W
1 ----

Byte 0:SDRAM Active/Inactive Register 1 = Enable, 0 = Disable , Default = Enabled

Bit Pin #

Bit 7 11 SDRAM5 Active/Inactive
Ordering Information
Ordering Code Pb-free

Package Name

Package Type 28-Pin SOIC

Operating Range

Commercial
28-Pin SOIC

Commercial
28-Pin SOIC Tape and Reel Commercial

Page 6 of 8

Package Diagram
28-Lead 300-Mil Molded SOIC S21

CY2313ANZ

Page 7 of 8

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

CY2313ANZ

Document History Page

Document Title CY2313ANZ 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs Document Number 38-07144

ECN NO.

Issue Date

Orig. of Change

Description of Change
110253 11/18/01

DSG Change from Spec number 38-00692 to 38-07144
121831 12/14/02

RBI Power up requirements added to Operating Conditions Information
1244583 See ECN DPF Added Pb-free part numbers in the Ordering Information

Page 8 of 8

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Datasheet ID: CY2313ANZSXC-1 507687