CY22801FXIT

CY22801FXIT Datasheet


CY22801

Part Datasheet
CY22801FXIT CY22801FXIT CY22801FXIT (pdf)
Related Parts Information
CY22801FXI CY22801FXI CY22801FXI
CY22801FXC CY22801FXC CY22801FXC
CY22801FXCT CY22801FXCT CY22801FXCT
PDF Datasheet Preview
CY22801

Universal Programmable Clock Generator UPCG
• Integrated Phase-Locked Loop PLL
• Field Programmable
• Input Frequency Range:

Crystal 8 to 30 MHz CLKIN 1 to 133 MHz
• LVCMOS Output Frequency 1 to 200 MHz Commercial Grade 1 to MHz Industrial Grade
• Low Jitter, High Accuracy Outputs
• 3.3V Operation
• Commercial and Industrial Temperature Ranges
• 8-Pin SOIC Package

Logic Block Diagram

XIN/CLKIN XOUT

XTAL OSC
• Inventory of only one device, CY22801, used in various applications
• In-house programming of sample and prototype quantities is made available using the CY36800 InstaClock kit
• Input and output frequencies are customized to suit your needs
• High-performance PLL is tailored for multiple applications
• Critical timing requirements met in complex system designs
• Application compatibility enabled

OUTPUT DIVIDERS

CLKA CLKB CLKC

Pin Configuration

Figure CY22801 8-Pin SOIC

XIN/CLKIN 1 VDD 2 NC 3 VSS 4
8 XOUT 7 CLKC 6 CLKA 5 CLKB

Table Pin Definition

Name XIN VDD NC VSS CLKB CLKA CLKC XOUT

Pin Number 1 2 3 4 5 6 7 8

Description Reference Input Crystal or External Clock 3.3V Voltage Supply No Connect leave this pin floating Ground Clock Output B Clock Output A Clock Output C Reference Output Connect to external crystal. When the reference is an external clock signal applied to pin 1 , this pin is not used and must be left floating.
• San Jose, CA 95134-1709
• 408-943-2600
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CY22801

The CY22801 is a flash-programmable clock generator that supports various applications in consumer and communications markets. The device uses a Cypress proprietary PLL to drive up to three configurable outputs in an 8-pin SOIC.

The CY22801 is programmed with an easy-to-use programmer dongle, the CY36800, in conjunction with the CyClocksRT software. This enables fast sample generation of prototype builds for user-defined frequencies.

Field Programming the CY22801

The CY22801 is programmed using the CY36800 USB programmer dongle. The CY22801 is flash-technology based, so the parts are reprogrammed up to 100 times. This enables fast and easy design changes and product updates, and eliminates any issues with old and out-of-date inventory.

Samples and small prototype quantities are programmed using the CY36800 programmer. Cypress’s value added distribution partners and third party programming systems from BP Microsystems, HiLo Systems, and others, are available for large production quantities.

CyClocksRT Software

CyClocksRT is an easy-to-use software application that enables the user to custom-configure the CY22801. Users can specify the XIN/CLKIN frequency, crystal load capacitance, and output frequencies. CyClocksRT then creates an industry standard JEDEC file, which is used to program the CY22801.

When needed, an advanced mode is available that enables users to override the automatically generated VCO frequency and output divider values.

CyClocksRT is a component of the CyberClocks software, which is downloaded free of charge from the Cypress website at

CY36800 InstaClock Kit

The Cypress CY36800 InstaClock Kit comes with everything needed to design the CY22801 and program samples and small prototype quantities. The CyClocksRT software is used to quickly create a JEDEC programming file, which is then downloaded directly to the portable programmer that is included in the CY36800 InstaClock Kit. The JEDEC file can also be saved for use in a production programming system for larger volumes.

The CY36800 also comes with five samples of the CY22800, which are programmed with preconfigured JEDEC files using the InstaClock software.

Output Clock Frequencies

The CY22801 is a very flexible clock generator with up to three individual outputs, generated from an integrated PLL. Details are shown in Figure

The output of the PLL runs at high frequency and is divided down to generate the output clocks. Two programmable dividers are available for this purpose. Thus, although the output clocks may be different frequencies, they must be related, based on the PLL frequency.

It is also possible to direct the reference clock input to any of the outputs, thereby bypassing the PLL. Lastly, the reference clock may be passed through either divider.

Figure Basic PLL Block Diagram

REF XIN/CLKIN
Ordering Information
Ordering Code CY22801FXC[7] CY22801FXI[7] CY22801SXC-xxx[7, 8] CY22801SXC-xxxT[7, 8] CY22801KFXC CY22801KFXCT CY22801KFXI CY22801KFXIT CY22801KSXC-xxx[8] CY22801KSXC-xxxT[8] CY22801KSXI-xxx[8] CY22801KSXI-xxxT[8]

Package Type 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC-Tape and Reel 8-Pin SOIC 8-Pin SOIC-Tape and Reel 8-Pin SOIC 8-Pin SOIC-Tape and Reel 8-Pin SOIC 8-Pin SOIC-Tape and Reel 8-Pin SOIC 8-Pin SOIC-Tape and Reel

Operating Range Commercial, 0°C to 70°C Industrial, 40°C to 85°C Commercial, 0°C to 70°C Commercial, 0°C to 70°C Commercial, 0°C to 70°C Commercial, 0°C to 70°C Industrial, 40°C to 85°C Industrial, 40°C to 85°C Commercial, 0°C to 70°C Commercial, 0°C to 70°C Industrial, 40°C to 85°C Industrial, 40°C to 85°C

Operating Voltage 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V

Package Diagram

Figure 8-Pin 150-Mil SOIC SZ08

PIN 1 ID 1

DIMENSIONS IN INCHES[MM] MIN.

MAX.

PIN 1 ID IS OPTIONAL, ROUND ON SINGLE LEADFRAME RECTANGULAR ON MATRIX LEADFRAME

REFERENCE JEDEC MS-012 PACKAGE WEIGHT 0.07gms

PART # S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG.

SEATING PLANE

X 45°
0°~8°
51-85066-*C

Notes

Not recommended for new designs.
Ordering codes with “xxx” are factory-programmed configurations. Factory programming is available for high volume orders. For more details, contact your local Cypress field application engineer or Cypress sales representative.

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CY22801

Document History Page

Document Title CY22801 Universal Programmable Clock Generator UPCG Document Number 001-15571

ECN NO.

Orig. of Change

Submission Date

Description of Change
1058080

KVM/
05/10/07 New data sheet

KKVTMP
*A 2440787 AESA
05/16/08
Updated template. Added Note 7 and Added existing part numbers CY22801FXCT, CY22801FXI, CY22801FXIT, CY22801SXC-xxx and CY22801SXC-xxxT in ordering information table. Added new part numbers CY22801KFXC, CY22801KFXCT, CY22801KFXI, CY22801KFXIT, CY22801KSXC-xxx and CY22801KSXC-xxxT.
2724806

KVM/

AESA
6/26/09
Add Industrial Grade Ambient Temperature to Recommended Operating Conditions. Add separate Fout max limit for industrial temp. Add temperature ranges to the Ordering Information Table. Remove CY22801FXCT and CY22801FXIT from Ordering Information Table. Add CY22801KSXI-xxx and CY22801KSXI-xxxT to Ordering Information Table. Correct package reference from S8 to SZ08.

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

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Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

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CyClocksRT, CyberClocks, and InstaClock are trademarks of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders.
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Datasheet ID: CY22801FXIT 507672