CYW43242KFFB4G

CYW43242KFFB4G Datasheet


Part Datasheet
CYW43242KFFB4G CYW43242KFFB4G CYW43242KFFB4G (pdf)
Related Parts Information
CYW43242KFFBG CYW43242KFFBG CYW43242KFFBG
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• 408-943-2600

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Data Sheet

BCM43242

Single-Chip IEEE a/b/g/n 2x2 MAC/ Baseband/Radio with Integrated Bluetooth + HS

The BCM43242 is a single-chip device for wireless media systems. It integrates the MAC, baseband, and radio of IEEE a/b/g and 2x2 IEEE 802.11n with Bluetooth + HS.

The BCM43242 takes advantage of the high throughput and extended range of the Broadcom second-generation MIMO solution. With MIMO, the information is sent and received over two or more antennas, simultaneously using the same frequency band, thus providing greater range and higher throughput, while maintaining compatibility with legacy IEEE 802.11a/b/g devices. This is accomplished through a combination of enhanced MAC and PHY implementations including spatial multiplexing modes in the transmitter and receiver, and advanced digital signal processing techniques to improve receive sensitivity. The BCM43242 architecture, with its fully integrated dual-band radio transceiver, supports 2 x 2 antennas. It also supports 20 and 40 MHz channels, allowing for PHY Layer throughput up to 300 Mbps.

Using advanced design techniques and process technology to reduce active and idle power, the

BCM43242 is designed to address the needs of media-embedded applications that require minimal power consumption and compact size.

It includes a power management unit that simplifies the system power topology and allows for operation directly from a 3.3V or 5V supply, which provides flexibility. The BCM43242 includes power saving schemes such as single-core listen OCL , singlecore demodulation of SISO/STBC packets, and dynamic maximum likelihood ML demapping which is based on channel conditions .

The BCM43242 implements the highly sophisticated Enhanced Collaborative Coexistence radio coexistence algorithms and hardware mechanisms. As a result, enhanced overall quality for simultaneous audio, video, and data transmission for home entertainment devices is achieved.

The WLAN host interface is USB The Bluetooth host interface options include full-speed USB and a high-speed UART.

Figure 1 Functional Block Diagram

WLAN Host I/F BT Host I/F

UART USB

BCM43242
5G WLAN

T/R SWT
2G WLAN

T/R SWT
5G WLAN

T/R SWT
2G WLAN/BT

SP3T

Ant1 Diplexer

Ant0 Diplexer

BT TX
5300 California Avenue
• Irvine, CA 92617
• Phone 949-926-5000
• Fax 949-926-5203
43242-DS103-R May 18, 2015

Not Recommended for New Designs
002-14920 *D 43242-DS103-R
09/21/16 05/18/15
43242-DS102-R 10/29/13

Change Description

Parts in this datasheets are not recommended for new designs Updated
• “Power Supply Topology” on page 16
• “BCM43242 PMU Features” on page 16
• Figure 3 “Typical Power Topology,” on page 17
• Table 15 “FCFBGA Signal Descriptions,” on page 75
• Table 19 “Absolute Maximum Ratings,” on page 84
• Table 21 “ESD Specifications,” on page 85
• Table 22 “Recommended Operating Conditions and DC

Characteristics,” on page 86
• Section 16 “WLAN RF Specifications, “Introduction” on page 94
• Table 33 “Core Buck Switching Regulator CBUCK Specifications,” on
page
• “Package Thermal Characteristics” on page
• Section 23 “Ordering Information,” on page Initial release

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BCM43242 Data Sheet

Table of Contents

Not Recommended for New Designs

Table of Contents

About This Document 11 Purpose and Audience 11 Acronyms and 11 Document Conventions 11

Technical Support 11

Section 1 Overview 12
12 14 Standards 15

Section 2 Power Supplies and Power Management 16

Power Supply 16 BCM43242 PMU Features 16

WLAN Power Management 18 PMU Sequencing 18 Power-Up/Power-Down/Reset 19

Section 3 Frequency 20

Crystal Interface and Clock Generation 20 21

Section 4 Bluetooth Subsystem Overview 23
23 Bluetooth 25

Transmit 25 Digital Modulator 25 Digital Demodulator and Bit 25 Power Amplifier 25 Receiver 26 Digital Demodulator and Bit 26 Receiver Signal Strength 26 Local Oscillator Generation 26 Calibration 26

Section 5 Bluetooth Baseband Core 27

Bluetooth 27 Link Control 28 Test Mode Support 28 Bluetooth Power Management Unit 29

RF Power Management 29

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BCM43242 Data Sheet

Table of Contents

Not Recommended for New Designs

Host Controller Power Management 29 BBC Power 31 Adaptive Frequency 31 Advanced Bluetooth/WLAN 32 Fast Connection Interlaced Page and Inquiry Scans 32

Section 6 Bluetooth Media 33

Wideband 33 Packet Loss Concealment 33 Encoders 34 Decoders 34 Multiple Simultaneous A2DP Audio Streams 34 Burst Buffer 34 SBC Offloading Support 35 3D DTV Support 35

Section 7 Microprocessor and Memory Unit for 36

RAM, ROM, and Patch Memory 36

Section 8 Bluetooth Peripheral Transport Unit 37

PCM 37 Slot Mapping 37 Frame Synchronization 37 Data 37 Wideband Speech Support 38 Burst PCM Mode 38 PCM Interface 38 Short Frame Sync, Master Mode 38 Short Frame Sync, Slave Mode 39 Long Frame Sync, Master 40 Long Frame Sync, Slave 41 Short Frame Sync, Burst 42 Long Frame Sync, Burst Mode 43

UART 44 I2S 46

I2S 47

Section 9 WLAN Global Functions 49

WLAN CPU and Memory 49 One-Time Programmable Memory 49 GPIO 50

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BCM43242 Data Sheet

Table of Contents
Section 22 Mechanical Information 115 Section 23 Ordering Information 116

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BCM43242 Data Sheet

List of Figures

List of Figures

Figure 1 Functional Block Diagram 1 Figure 2 BCM43242 Block Diagram 13 Figure 3 Typical Power Topology 17 Figure 4 Recommended Oscillator Configuration 20 Figure 5 Recommended Circuit to Use with an External Dedicated TCXO 21 Figure 6 Recommended Circuit to Use with an External Shared 21 Figure 7 Start-up Signaling Sequence 30 Figure 8 CVSD Decoder Output Waveform Without PLC 33 Figure 9 CVSD Decoder Output Waveform After Applying 34 Figure 10 PCM Timing Diagram Short Frame Sync, Master Mode 38 Figure 11 PCM Timing Diagram Short Frame Sync, Slave Mode 39 Figure 12 PCM Timing Diagram Long Frame Sync, Master 40 Figure 13 PCM Timing Diagram Long Frame Sync, Slave 41 Figure 14 PCM Burst Mode Timing Receive Only, Short Frame Sync 42 Figure 15 PCM Burst Mode Timing Receive Only, Long Frame Sync 43 Figure 16 UART Timing 45 Figure 17 I2S Transmitter Timing 48 Figure 18 I2S Receiver Timing 48 Figure 19 WLAN USB Host Interface Block Diagram 51 Figure 20 WLAN MAC Architecture 54 Figure 21 WLAN PHY Block 58 Figure 22 STBC Receive Block Diagram 59 Figure 23 Radio Functional Block Diagram 61 Figure 24 FCFBGA Ball Map Top 1 of 63 Figure 25 FCFBGA Ball Map Top 2 of 64 Figure 26 RF Port Location for Bluetooth 85 Figure 27 Port 92 Figure 28 WLAN = ON, Bluetooth = ON 112 Figure 29 WLAN = OFF, Bluetooth = 112 Figure 30 WLAN = ON, Bluetooth = OFF 113 Figure 31 WLAN = OFF, Bluetooth = ON 113 Figure 32 FCFBGA Package Mechanical Information 115

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BCM43242 Data Sheet

List of Tables

List of Tables

Table 1 Power-Up/Power-Down/Reset Control 19 Table 2 Crystal Oscillator and External Clock Requirements and 22 Table 3 Power Control Pin Description 29 Table 4 PCM Interface Timing Specifications Short Frame Sync, Master 38 Table 5 PCM Interface Timing Specifications Short Frame Sync, Slave 39 Table 6 PCM Interface Timing Specifications Long Frame Sync, Master Mode 40 Table 7 PCM Interface Timing Specifications Long Frame Sync, Slave Mode 41 Table 8 PCM Burst Mode Receive Only, Short Frame Sync 42 Table 9 PCM Burst Mode Receive Only, Long Frame Sync 43 Table 10 Example of Common Baud 44 Table 11 UART Timing Specifications 45 Table 12 Timing for I2S Transmitters and Receivers 47 Table 13 Pin List By Pin Number 65 Table 14 Alphabetical Pin List By Pin 69 Table 15 FCFBGA Signal 73 Table 16 WLAN GPIO Functions and Strapping Options 79 Table 17 Multiplexed Bluetooth Digital I/O Signal Matrix 80 Table 18 Multiplexed Digital I/O Signals 81 Table 19 Absolute Maximum Ratings 82 Table 20 Environmental 83 Table 21 ESD Specifications 83 Table 22 Recommended Operating Conditions and DC Characteristics 84 Table 23 Bluetooth Receiver RF 86 Table 24 Bluetooth Transmitter RF 89 Table 25 Local Oscillator Performance 90 Table 26 BLE RF Specifications 91 Table 27 GHz Band General RF 93 Table 28 WLAN GHz Receiver Performance Specifications 93 Table 29 WLAN GHz Transmitter Performance Specifications 96 Table 30 WLAN 5 GHz Receiver Performance Specifications 97 Table 31 WLAN 5 GHz Transmitter Performance Specifications 100 Table 32 General Spurious Emissions Specifications 101 Table 33 Core Buck Switching Regulator CBUCK Specifications 102 Table 34 CLDO 104 Table 35 LNLDO2 Specifications 105

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BCM43242 Data Sheet

List of Tables

Table 36 LNLDO1 Specifications 106 Table 37 GHz WLAN Current Consumption 107 Table 38 5 GHz WLAN Current Consumption 108 Table 39 BT Power Consumption Referenced at 3.3V VDD33 109 Table 40 JTAG Timing Characteristics 110 Table 41 Package JEDEC Thermal Characteristics 114

Not Recommended for New Designs

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BCM43242 Data Sheet

About This Document

About This Document

Purpose and Audience

This data sheet provides details about the functional, operational, and electrical characteristics of the Broadcom BCM43242. It is intended for hardware design, application, and OEM engineers.

Acronyms and Abbreviations

In most cases, acronyms and abbreviations are defined on first use.

For a comprehensive list of acronyms and other terms used in Broadcom documents, go to:

Document Conventions

The following conventions may be used in this document:

Convention Bold Monospace
<> []

User input and actions for example, type exit, click OK, press Alt+C Code #include <iostream> HTML <td rowspan = 3> Command line commands and parameters wl [-l] <command> Placeholders for required elements enter your <username> or wl <command> Indicates optional command-line parameters wl [-l] Indicates bit and byte ranges inclusive [0:3] or [7:0]

Technical Support

Broadcom provides customer access to a wide range of information, including technical documentation, schematic diagrams, product bill of materials, PCB layout information, and software updates through its customer support portal For a CSP account, contact your Sales or Engineering support representative.

In addition, Broadcom provides other product support through its Downloads and Support site

May 18, 2015
• 43242-DS103-R
Ordering Information
Section 23 Ordering Information

Package

Operating Ambient Temperature

BCM43242KFFBG FCFBGA mm x mm, mm pitch
to +70°Ca
a. Absolute junction temperature limits are maintained through active thermal monitoring and dynamic TX duty cycle limiting.

Not Recommended for New Designs

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BCM43242 Data Sheet

Not Recommended for New Designs

Corporation reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design.

Information furnished by Broadcom Corporation is believed to be accurate and reliable. However, Broadcom Corporation does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others.

Broadcom Corporation
5300 California Avenue Irvine, CA 92617 2015 by BROADCOM CORPORATION. All rights reserved.
43242-DS103-R

May 18, 2015

Phone 949-926-5000 Fax 949-926-5203 E-mail Web:
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Datasheet ID: CYW43242KFFB4G 507646