CDBWM8993-M-1

CDBWM8993-M-1 Datasheet


Part Datasheet
CDBWM8993-M-1 CDBWM8993-M-1 CDBWM8993-M-1 (pdf)
Related Parts Information
CDKWM8993-S-1 CDKWM8993-S-1 CDKWM8993-S-1
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WM8993

Audio Hub Codec for Multimedia Phones

The WM8993 is a highly integrated ultra-low power hi-fi CODEC designed for portable devices such as multimedia phones.

A stereo 1W/channel speaker driver can operate in class D or AB mode. Low leakage and high PSRR across the audio band enable direct battery connection for the speaker supply.

Class W headphone drivers provide a dramatic reduction in playback power and are ground-referenced. Active ground loop noise rejection and DC offset correction help prevent pop noise and ground noise from degrading headphone output quality.

Powerful mixing capability allows the device to support a huge range of architectures and use cases. A highly flexible input configuration supports multiple microphone or line inputs mono or stereo, single-ended or differential .

Fully differential internal architecture and on-chip RF noise filters ensure a very high degree of noise immunity.

ReTuneTM Mobile parametric EQ with fully programmable coefficients is integrated for optimization of speaker characteristics. Programmable dynamic range control is also available for maximizing loudness, protecting speakers from clipping and preventing premature shutdown due to battery droop.

The WM8993 is supplied in very small and thin 48-ball W-CSP package, ideal for portable systems.
• 100dB SNR during DAC playback ‘A’ weighted
• Low power, low noise MIC interface
• Class D or AB stereo speaker driver
- Stereo1W into BTL speaker at <1% THD - Mono 2W into BTL speaker
• ReTune Mobile parametric equalizer
• Dynamic range controller
• Low power Class W headphone drivers - Integrated charge pump and DC offset correction - 5mW total power for DAC playback to headphones
• Digital audio interface - All standard data formats and 2-channel TDM supported - All standard sample rates from 8kHz to 48kHz
• Low power FLL - Provides all necessary internal clocks - 32kHz to 27MHz input frequency - Free-running mode for class D and charge pump
• 4 highly flexible line outputs single-ended or differential
• Dedicated earpiece driver
• “Direct voice” and “Direct DAC” paths to outputs - Low noise paths bypass all internal mixers - Low power consumption
• Active noise reduction - DC offset correction removes pops and clicks - Ground loop noise cancellation
• 48-ball W-CSP package 3.65x3.55x0.546mm, 0.5mm pitch
• Multimedia phones

IN1LN IN1LP IN2LN IN2LP/VRXN IN1RN IN1RP IN2RN IN2RP/VRXP

AVDD1 VMIDC AGND1 AVDD2

DCVDD DBVDD DGND

SPKVDD SPKGND

CPVDD CPGND

CPVOUTP CPVOUTN

CHARGE PUMP

CPFB1 CPFB2

HEADPHONE DRIVERS

HPOUT1L HPOUT1R HPOUT1FB

MICBIAS1 MICBIAS2

MIC INTERFACE

Current Detect

GPIO Current Detect

GPIO

INPUT MIXERS

ADC L

ADC R RECORD

ADC FILTERS

HIGH PASS FILTERS

ADC VOLUME

ReTuneTM Mobile PARAMETRIC EQUALISER

DYNAMIC RANGE CONTROL

FLL GPIO

AUDIO CLOCKS

DIGITAL AUDIO INTERFACE

DAC FILTERS

DAC VOLUME

DAC L DAC R
ORDERING

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING

THERMAL

ELECTRICAL CHARACTERISTICS

TERMINOLOGY 23

TYPICAL PERFORMANCE

POWER CONSUMPTION 24

AUDIO SIGNAL PATHS DIAGRAM

SIGNAL TIMING REQUIREMENTS

MASTER CLOCK 26 AUDIO INTERFACE TIMING 27

MASTER MODE

SLAVE

TDM MODE

CONTROL INTERFACE TIMING 30

DEVICE DESCRIPTION

INTRODUCTION 31 INPUT SIGNAL PATH 33

MICROPHONE INPUTS

MICROPHONE BIAS CONTROL

MICROPHONE CURRENT DETECT

LINE AND VOICE CODEC INPUTS

INPUT PGA ENABLE

INPUT PGA CONFIGURATION

INPUT PGA VOLUME

INPUT MIXER

INPUT MIXER CONFIGURATION AND VOLUME CONTROL

ANALOGUE TO DIGITAL CONVERTER ADC 43

ADC DIGITAL VOLUME

HIGH PASS FILTER

DIGITAL 46

DIGITAL MIXING PATHS

DAC INTERFACE VOLUME BOOST

DIGITAL

DYNAMIC RANGE CONTROL DRC 49

COMPRESSION/LIMITING CAPABILITIES

GAIN

DYNAMIC CHARACTERISTICS

ANTI-CLIP CONTROL

QUICK RELEASE CONTROL

GAIN SMOOTHING

INITIALISATION
ORDERING INFORMATION

ORDER CODE TEMPERATURE RANGE

PACKAGE

WM8993ECS/RV

Note Reel quantity = 3500
-40C to +85C
48-ball W-CSP Pb-free, Tape and reel

MOISTURE SENSITIVITY LEVEL

MSL1

PEAK SOLDERING TEMPERATURE
260C

PIN DESCRIPTION

PIN NO A5 B5 C5

NAME MICBIAS1 MICBIAS2

IN1LN

TYPE Analogue Output Analogue Output Analogue Input

IN1LP

Analogue Input

IN2LN/GI7 Analogue Input /

Digital Input

DESCRIPTION Microphone bias Microphone bias Left channel single-ended MIC input / Left channel negative differential MIC input Left channel line input / Left channel positive differential MIC input Left channel line input / Left channel negative differential MIC input /

WM8993

PIN NO

NAME

IN2LP/VRXN

IN1RN

IN1RP

IN2RN/GI8

IN2RP/VRXP

DCVDD

DGND

DBVDD

AVDD1

AVDD2

AGND

CPVDD

CPGND

SPKVDD

SPKGND

CPVOUTP

CPVOUTN
The Moisture Sensitivity Level for each package type is specified in Ordering Information.

CONDITION Supply voltages AVDD1, DBVDD Supply voltages AVDD2, DCVDD Supply voltages CPVDD Supply voltages SPKVDD Voltage range digital inputs Voltage range analogue inputs Operating temperature range, TA Junction temperature, TJMAX Storage temperature after soldering

MIN -0.3V -0.3V -0.3V -0.3V DGND -0.3V AGND -0.3V -40ºC -40ºC -65ºC

MAX +4.5V +2.5V +2.2V +7.0V DBVDD +0.3V AVDD1 +0.3V +85ºC +150ºC +150ºC

RECOMMENDED OPERATING CONDITIONS

PARAMETER

Digital supply range Core

DCVDD

Digital supply range I/O

DBVDD

Analogue supply 1 range

AVDD1

Analogue supply 2 range

AVDD2

Charge Pump supply range

CPVDD

Speaker supply range

SPKVDD

Ground

DGND, AGND, CPGND,

SPKGND

Notes

Analogue, digital and speaker grounds must always be within 0.3V of each other.

There is no power sequencing requirement the supplies may be enabled in any order.

DCVDD must be less than or equal to AVDD1 and AVDD2.

DCVDD must be less than or equal to DBVDD.

AVDD1 must be less than or equal to SPKVDD.

UNIT V

WM8993

THERMAL PERFORMANCE

Thermal analysis should be performed in the intended application to prevent the WM8993 from exceeding maximum junction temperature. Several contributing factors affect thermal performance most notably the physical properties of the mechanical enclosure, location of the device on the PCB in relation to surrounding components and the number of PCB layers. Connecting the GND balls through thermal vias and into a large ground plane will aid heat extraction.

Three main heat transfer paths exist to surrounding air as illustrated below in Figure 1:
- Package top to air radiation .
- Package bottom to PCB radiation .
- Package balls to PCB conduction .

W-CSP Package

Figure 1 Heat Transfer Paths

The temperature rise TR is given by TR = PD *
- PD is the power dissipated in the device.
- is the thermal resistance from the junction of the die to the ambient temperature and is therefore a measure of heat transfer from the die to surrounding air. is determined with reference to JEDEC standard JESD51-9.

The junction temperature TJ is given by TJ = TA +TR, where TA is the ambient temperature.
More datasheets: 5900-221 | 5900-181 | 5900-121 | 5900-101 | 5900-820 | 5900-680 | 5900-560 | 5900-151 | EPMHH21E | 80049 SL005


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Datasheet ID: CDBWM8993-M-1 523284