CS4351-DZZR/B

CS4351-DZZR/B Datasheet

CS4351

Part	Datasheet
CS4351-DZZR/B	CS4351-DZZR/B (pdf)

Related Parts	Information
CDB4351	CDB4351
CS4351-CZZR	CS4351-CZZR
CS4351-CZZR/B	CS4351-CZZR/B
CS4351-DZZ/B	CS4351-DZZ/B
CS4351-DZZ	CS4351-DZZ
CS4351-CZZ/B	CS4351-CZZ/B
CS4351-DZZR	CS4351-DZZR
CS4351-CZZ	CS4351-CZZ

PDF Datasheet Preview
CS4351 192 kHz Stereo DAC with 2 Vrms Line Out ! Multi-Bit Delta-Sigma Modulator ! 24-Bit Conversion ! Up to 192 kHz Sample Rates ! 112 dB Dynamic Range ! -100 dB THD+N ! V, +9 to 12 V, and VL Power Supplies ! 2 Vrms Output into 5 AC Load ! Digital Volume Control with Soft Ramp 119 dB Attenuation 1/2 dB Step Size Zero Crossing Click-Free Transitions ! ATAPI Mixing ! Low Clock Jitter Sensitivity ! Technology for Control of Clicks and Pops The CS4351 is a complete stereo digital-to-analog system including digital interpolation, fifth-order multi-bit delta-sigma digital-to-analog conversion, digital de-emphasis, volume control, channel mixing, analog filtering, and on-chip 2 Vrms line-level driver. The advantages of this architecture include ideal differential linearity, no distortion mechanisms due to resistor matching errors, no linearity drift over time and temperature, high tolerance to clock jitter, and a minimal set of external components. The CS4351 is available in a 20-pin TSSOP package in both Commercial -10°C - +70°C and Automotive grades -40°C to +85°C . The CDB4351 Customer Demonstration board is also available for device evaluation and implementation suggestions. Please see “Ordering Information” on page 37 for complete details. These features are ideal for cost-sensitive, 2-channel audio systems including DVD players, A/V receivers, set-top boxes, digital TVs and VCRs, mini-component systems, and mixing consoles. 8 V to 3.3V dware or I2C/SPI Control Data Reset erial Audio Input Level Translator Register/Hardware Configuration PCM Serial Interface Interpolation Filter with Volume Control Interpolation Filter with Volume Control Multibit Modulator Multibit Modulator Auto Speed Mode Detect 9 V to 12 V 2 Vrms Line Level + Filter Left Channel Outpu 2 Vrms Line Level Right Channel Filter Output Internal Voltage Reference External Mute Control Left and Right Mute Controls Copyright Cirrus Logic, Inc. 2005 All Rights Reserved DECEMBER '05 DS566F1 CS4351 TABLE OF CONTENTS PIN DESCRIPTION 5 CHARACTERISTICS AND SPECIFICATIONS 6 SPECIFIED OPERATING CONDITIONS 6 ABSOLUTE MAXIMUM RATINGS 6 DAC ANALOG CHARACTERISTICS 7 COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE 8 COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE 9 SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE 10 SWITCHING CHARACTERISTICS - CONTROL PORT - FORMAT 11 SWITCHING CHARACTERISTICS - CONTROL PORT - SPI 12 DIGITAL 13 POWER AND THERMAL CHARACTERISTICS 13 TYPICAL CONNECTION DIAGRAM 14 APPLICATIONS 15 Sample Rate Range/Operational Mode Detect 15 Auto-Detect Enabled 15 Auto-Detect Disabled 15 System Clocking 15 Digital Interface Format 16 Stand-Alone Mode 16 Control Port Mode 16 De-Emphasis Control 17 Stand-Alone Mode 18 Control Port Mode 18 Recommended Power-Up Sequence 18 Stand-Alone Mode 18 Control Port Mode 18 Transient Control 18 Power-Up 18 Power-Down 19 Discharge Time 19 Mute Control 19 Grounding and Power Supply Arrangements 19 Capacitor Placement 19 Control Port Interface 20 MAP Auto Increment 20 Mode 20 SPI Mode 21 Memory Address Pointer MAP 22 INCR Auto Map Increment Enable 22 MAP Memory Address Pointer 22 REGISTER QUICK REFERENCE 23 REGISTER DESCRIPTION 24 Chip ID - Register 01h 24 Mode Control 1 - Register 02h 24 Digital Interface Format DIF2:0 Bits 6-4 24 De-Emphasis Control DEM1:0 Bits 24 Functional Mode FM Bits 1-0 25 Volume Mixing and Inversion Control - Register 03h 25 Channel A Volume = Channel B Volume VOLB=A Bit 7 25 Invert Signal Polarity Invert_A Bit 6 25 Invert Signal Polarity Invert_B Bit 5 25 DS566F1 CS4351 ATAPI Channel Mixing and Muting ATAPI3:0 Bits 3-0 26 Mute Control - Register 04h 27 Auto-Mute AMUTE Bit 7 27 AMUTEC = BMUTEC MUTEC A=B Bit 5 27 A Channel Mute MUTE_A Bit 4 B Channel Mute MUTE_B Bit 3 27 Channel A Volume Control - Register 05h LIST OF FIGURES Figure Serial Input Timing 10 Figure Control Port Timing - 11 Figure Control Port Timing - SPI Format 12 Figure Typical Connection 14 Figure Left-Justified up to 24-Bit 17 Figure up to 24-Bit Data 17 Figure Right-Justified 17 Figure De-Emphasis 17 Figure Control Port Timing, Mode 21 Figure 10.Control Port Timing, SPI mode 22 Figure 11.De-Emphasis 24 Figure 12.ATAPI Block Diagram 26 Figure 13.Single-Speed fast Stopband 31 Figure 14.Single-Speed fast Transition Band 31 Figure 15.Single-Speed fast Transition Band detail 31 Figure 16.Single-Speed fast Passband Ripple 31 Figure 17.Single-Speed slow Stopband Rejection 31 Figure 18.Single-Speed slow Transition 31 Figure 19.Single-Speed slow Transition Band 32 Figure 20.Single-Speed slow Passband 32 Figure 21.Double-Speed fast Stopband Rejection 32 Figure 22.Double-Speed fast Transition 32 Figure 23.Double-Speed fast Transition Band 32 Figure 24.Double-Speed fast Passband 32 Figure 25.Double-Speed slow Stopband Rejection 33 Figure 26.Double-Speed slow Transition Band 33 Figure 27.Double-Speed slow Transition Band detail 33 Figure 28.Double-Speed slow Passband Ripple 33 DS566F1 CS4351 Figure 29.Quad-Speed fast Stopband Rejection 33 Figure 30.Quad-Speed fast Transition Band 33 Figure 31.Quad-Speed fast Transition Band detail 34 Figure 32.Quad-Speed fast Passband Ripple 34 Figure 33.Quad-Speed slow Stopband 34 Figure 34.Quad-Speed slow Transition 34 Figure 35.Quad-Speed slow Transition Band 34 Figure 36.Quad-Speed slow Passband 34 LIST OF TABLES DS566F1 PIN DESCRIPTION SDIN SCLK LRCK MCLK DIF1 SCL/CCLK DIF0 SDA/CDIN DEM AD0/CS AMUTEC AOUTA VA_H AOUTB BMUTEC VBIAS CS4351 Pin Name # Pin Description SDIN 1 Serial Audio Data Input - Input for two’s complement serial audio data. SCLK 2 Serial Clock Input - Serial clock for the serial audio interface. LRCK Left / Right Clock Input - Determines which channel, Left or Right, is currently active on the serial audio data line. MCLK 4 Master Clock Input - Clock source for the delta-sigma modulator and digital filters. 5 Digital Power Input - Positive power supply for the digital section. Ground Input - Ground reference. 10 Reset Input - Powers down device and resets all internal resisters to their default settings when enabled. 11 Low Voltage Analog Power Input - Positive power supply for the analog section. VBIAS 12 Positive Voltage Reference Output - Positive reference voltage for the internal DAC. 13 Quiescent Voltage Output - Filter connection for internal quiescent voltage. VA_H 17 High Voltage Analog Power Input - Positive power supply for the analog section. 10.ORDERING INFORMATION Product CS4351 CDB4351 Package 192 kHz Stereo DAC with 2 Vrms Line Out 20-pin TSSOP CS4351 Evaluation Board Pb-Free YES - Grade Commercial Automotive - Temp Range -10° to +70° C -40° to +85° C - Container Order # Rail CS4351-CZZ Tape & Reel CS4351-CZZR Rail CS4351-DZZ Tape & Reel CS4351-DZZR CDB4351 11.REVISION HISTORY Release PP3 PP4 F1 Date March 2005 July 2005 December 2005 Changes Removed CS4351-CZ ordering option. Added CS4351-DZZ ordering option. Updated Tslrd spec on page Updated Tdh spec on page Updated VIL specification on page Updated legal text. Updated full-scale output specification on page Updated gain drift on page 7 Updated ordering information. Updated status to final Updated legal text Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find one nearest you, go to IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE “CRITICAL APPLICATIONS” . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, the Cirrus Logic logo designs, and Popguard are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. SPI is a trademark of Motorola, Inc. is a registered trademark of Philips Semiconductor. DS566F1

PDF Datasheet Preview

CS4351
192 kHz Stereo DAC with 2 Vrms Line Out
! Multi-Bit Delta-Sigma Modulator ! 24-Bit Conversion ! Up to 192 kHz Sample Rates ! 112 dB Dynamic Range ! -100 dB THD+N ! V, +9 to 12 V, and VL Power Supplies ! 2 Vrms Output into 5 AC Load ! Digital Volume Control with Soft Ramp
119 dB Attenuation 1/2 dB Step Size Zero Crossing Click-Free Transitions
! ATAPI Mixing ! Low Clock Jitter Sensitivity ! Technology for Control of Clicks
and Pops

The CS4351 is a complete stereo digital-to-analog system including digital interpolation, fifth-order multi-bit delta-sigma digital-to-analog conversion, digital de-emphasis, volume control, channel mixing, analog filtering, and on-chip 2 Vrms line-level driver. The advantages of this architecture include ideal differential linearity, no distortion mechanisms due to resistor matching errors, no linearity drift over time and temperature, high tolerance to clock jitter, and a minimal set of external components.
The CS4351 is available in a 20-pin TSSOP package in both Commercial -10°C - +70°C and Automotive grades -40°C to +85°C . The CDB4351 Customer Demonstration board is also available for device evaluation and implementation suggestions. Please see “Ordering Information” on page 37 for complete details.

These features are ideal for cost-sensitive, 2-channel audio systems including DVD players, A/V receivers, set-top boxes, digital TVs and VCRs, mini-component systems, and mixing consoles.
8 V to 3.3V dware or I2C/SPI

Control Data Reset
erial Audio Input

Level Translator

Register/Hardware Configuration

PCM Serial Interface

Interpolation Filter with

Volume Control

Interpolation Filter with

Volume Control

Multibit Modulator

Multibit Modulator

Auto Speed Mode Detect
9 V to 12 V
2 Vrms Line Level
+ Filter

Left Channel Outpu
2 Vrms Line Level

Right Channel

Filter

Output

Internal Voltage Reference

External Mute Control

Left and Right Mute Controls

Copyright Cirrus Logic, Inc. 2005 All Rights Reserved

DECEMBER '05 DS566F1

CS4351

TABLE OF CONTENTS

PIN DESCRIPTION 5 CHARACTERISTICS AND SPECIFICATIONS 6

SPECIFIED OPERATING CONDITIONS 6 ABSOLUTE MAXIMUM RATINGS 6 DAC ANALOG CHARACTERISTICS 7 COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE 8 COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE 9 SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE 10 SWITCHING CHARACTERISTICS - CONTROL PORT - FORMAT 11 SWITCHING CHARACTERISTICS - CONTROL PORT - SPI 12 DIGITAL 13 POWER AND THERMAL CHARACTERISTICS 13 TYPICAL CONNECTION DIAGRAM 14 APPLICATIONS 15 Sample Rate Range/Operational Mode Detect 15

Auto-Detect Enabled 15 Auto-Detect Disabled 15 System Clocking 15 Digital Interface Format 16 Stand-Alone Mode 16 Control Port Mode 16 De-Emphasis Control 17 Stand-Alone Mode 18 Control Port Mode 18 Recommended Power-Up Sequence 18 Stand-Alone Mode 18 Control Port Mode 18 Transient Control 18 Power-Up 18 Power-Down 19 Discharge Time 19 Mute Control 19 Grounding and Power Supply Arrangements 19 Capacitor Placement 19 Control Port Interface 20 MAP Auto Increment 20 Mode 20 SPI Mode 21 Memory Address Pointer MAP 22 INCR Auto Map Increment Enable 22 MAP Memory Address Pointer 22 REGISTER QUICK REFERENCE 23 REGISTER DESCRIPTION 24 Chip ID - Register 01h 24 Mode Control 1 - Register 02h 24 Digital Interface Format DIF2:0 Bits 6-4 24 De-Emphasis Control DEM1:0 Bits 24 Functional Mode FM Bits 1-0 25 Volume Mixing and Inversion Control - Register 03h 25 Channel A Volume = Channel B Volume VOLB=A Bit 7 25 Invert Signal Polarity Invert_A Bit 6 25 Invert Signal Polarity Invert_B Bit 5 25

DS566F1

CS4351

ATAPI Channel Mixing and Muting ATAPI3:0 Bits 3-0 26 Mute Control - Register 04h 27

Auto-Mute AMUTE Bit 7 27 AMUTEC = BMUTEC MUTEC A=B Bit 5 27 A Channel Mute MUTE_A Bit 4

B Channel Mute MUTE_B Bit 3 27 Channel A Volume Control - Register 05h
LIST OF FIGURES

Figure Serial Input Timing 10 Figure Control Port Timing - 11 Figure Control Port Timing - SPI Format 12 Figure Typical Connection 14 Figure Left-Justified up to 24-Bit 17 Figure up to 24-Bit Data 17 Figure Right-Justified 17 Figure De-Emphasis 17 Figure Control Port Timing, Mode 21 Figure 10.Control Port Timing, SPI mode 22 Figure 11.De-Emphasis 24 Figure 12.ATAPI Block Diagram 26 Figure 13.Single-Speed fast Stopband 31 Figure 14.Single-Speed fast Transition Band 31 Figure 15.Single-Speed fast Transition Band detail 31 Figure 16.Single-Speed fast Passband Ripple 31 Figure 17.Single-Speed slow Stopband Rejection 31 Figure 18.Single-Speed slow Transition 31 Figure 19.Single-Speed slow Transition Band 32 Figure 20.Single-Speed slow Passband 32 Figure 21.Double-Speed fast Stopband Rejection 32 Figure 22.Double-Speed fast Transition 32 Figure 23.Double-Speed fast Transition Band 32 Figure 24.Double-Speed fast Passband 32 Figure 25.Double-Speed slow Stopband Rejection 33 Figure 26.Double-Speed slow Transition Band 33 Figure 27.Double-Speed slow Transition Band detail 33 Figure 28.Double-Speed slow Passband Ripple 33

DS566F1

CS4351

Figure 29.Quad-Speed fast Stopband Rejection 33 Figure 30.Quad-Speed fast Transition Band 33 Figure 31.Quad-Speed fast Transition Band detail 34 Figure 32.Quad-Speed fast Passband Ripple 34 Figure 33.Quad-Speed slow Stopband 34 Figure 34.Quad-Speed slow Transition 34 Figure 35.Quad-Speed slow Transition Band 34 Figure 36.Quad-Speed slow Passband 34

LIST OF TABLES

DS566F1

PIN DESCRIPTION

SDIN

SCLK

LRCK

MCLK

DIF1 SCL/CCLK

DIF0 SDA/CDIN

DEM AD0/CS

AMUTEC

AOUTA

VA_H

AOUTB

BMUTEC

VBIAS

CS4351

Pin Name #

Pin Description

SDIN
1 Serial Audio Data Input - Input for two’s complement serial audio data.

SCLK
2 Serial Clock Input - Serial clock for the serial audio interface.

LRCK

Left / Right Clock Input - Determines which channel, Left or Right, is currently active on the serial audio data line.

MCLK
4 Master Clock Input - Clock source for the delta-sigma modulator and digital filters.
5 Digital Power Input - Positive power supply for the digital section.

Ground Input - Ground reference.
10 Reset Input - Powers down device and resets all internal resisters to their default settings when enabled.
11 Low Voltage Analog Power Input - Positive power supply for the analog section.

VBIAS
12 Positive Voltage Reference Output - Positive reference voltage for the internal DAC.
13 Quiescent Voltage Output - Filter connection for internal quiescent voltage.

VA_H
17 High Voltage Analog Power Input - Positive power supply for the analog section.
10.ORDERING INFORMATION

Product CS4351 CDB4351

Package
192 kHz Stereo DAC with 2 Vrms Line Out
20-pin TSSOP

CS4351 Evaluation Board

Pb-Free YES -

Grade Commercial

Automotive -

Temp Range -10° to +70° C
-40° to +85° C -

Container Order #

Rail CS4351-CZZ

Tape & Reel CS4351-CZZR

Rail CS4351-DZZ

Tape & Reel CS4351-DZZR

CDB4351
11.REVISION HISTORY

Release PP3

PP4 F1

Date March 2005

July 2005 December 2005
Changes Removed CS4351-CZ ordering option. Added CS4351-DZZ ordering option. Updated Tslrd spec on page Updated Tdh spec on page Updated VIL specification on page Updated legal text. Updated full-scale output specification on page Updated gain drift on page 7 Updated ordering information. Updated status to final Updated legal text

Contacting Cirrus Logic Support

For all product questions and inquiries, contact a Cirrus Logic Sales Representative.

To find one nearest you, go to

IMPORTANT NOTICE

Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE “CRITICAL APPLICATIONS” . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, the Cirrus Logic logo designs, and Popguard are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

SPI is a trademark of Motorola, Inc.
is a registered trademark of Philips Semiconductor.

DS566F1

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CS4351-DZZR/B Datasheet file may be downloaded here without warranties.

Datasheet ID: CS4351-DZZR/B 523180