CS42L92-CWZR

CS42L92-CWZR Datasheet

CS42L92

Part	Datasheet
CS42L92-CWZR	CS42L92-CWZR (pdf)

PDF Datasheet Preview
CS42L92 32-Bit 384-kHz Hi-Fi Audio Codec • Integrated multichannel 32-bit hi-fi audio hub codec 99-dB signal-to-noise ratio SNR mic input 48 kHz 127-dB SNR headphone playback 48 kHz total harmonic distortion + noise THD+N Ultrasonic input- and output-path support • Up to eight analog or digital microphone DMIC inputs • Multipurpose headphone/earpiece/line output drivers Support for balanced headphone output loads 33 mW into load at THD+N Hi-fi filters for audiophile-quality playback • Native audio playback up to 384 kHz sample rate, concurrent with voice and ultrasonic input signal paths • Digital pulse-density modulation PDM output interface • Multichannel asynchronous sample-rate conversion • Multiline audio and control interface • Three multichannel digital-audio interfaces Standard data formats up to 384 kHz, 32 bits • Flexible clocking, derived from MCLKn, AIFn, or SLIMbus Low-power frequency-locked loops FLLs support reference clocks down to 32 kHz. • Advanced accessory detection functions • Configurable functions on up to 16 general-purpose input/output GPIO pins • Integrated regulators and charge pumps • Small W-CSP package, 0.4-mm staggered ball array • Smartphones, tablets, and multimedia handsets MICVDD CP2VOUT CP2CA CP2CB CP1C1A CP1C1B CP1VOUT1P CP1VOUT1N CP1C2A CP1C2B CP1VOUT2P CP1VOUT2N AVDD AGND VREFC FLLVDD CPVDD1 CPVDD2 CPGND DCVDD DBVDD FLLGND DGND SUBGND MICBIAS1A MICBIAS1B MICBIAS1C MICBIAS1D MICBIAS2A MICBIAS2B LDO and MICBIAS Generators Charge Pumps IN1ALN/DMICCLK1, IN1BLN IN1ALP/DMICDAT1, IN1BLP IN1ARN/DMICCLK3 IN1ARP/DMICDAT3, IN1BR IN2ALN/DMICCLK2 IN2ALP/DMICDAT2, IN2BL IN2ARN/DMICCLK4 IN2ARP/DMICDAT4, IN2BR Input Select 4 x ADC 4 x Stereo Digital Mic Interface MCLK1 MCLK2 MCLK3 RESET IRQ AIFnBCLK AIFnLRCLK SLIMCLK Clocking Control SYSCLK ASYNCCLK Digital Audio Interfaces AIF1, AIF2, AIF3 CS42L92 Reference Generator Digital Mixing Core Programmable DSP Five-band equalizer EQ Dynamic range control DRC Low-pass/high-pass filter LHPF Asynchronous sample -rate conversion Automatic sample -rate detection Data format conversion Ultrasonic demodulator PWM signal generator Haptic control signal generator PDM Driver AEC Echo Cancelation Loop-Back SLIMbus Interface Control Interface SPI/I2C DS1162F1 1 Pin Descriptions WLCSP Pinout CS42L92 1 Pin Descriptions CPVDD1 B3 CP1VOUT2N B5 HPOUT4L HPOUT3L HPOUT2L B11 HPOUT1L B13 CP2CA CP2CB CP1C2A CPGND CP1C2B C6 HPOUT3R C8 HPOUT2R D3 CP1VOUT2P D5 HPOUT4R CPVDD2 E4 CP1VOUT1P E6 TRST MICDET5/ HPOUTFB5 E8 JACKDET1 HPDET2 HPOUT1R MICDET4/ HPOUTFB4 MICDET3/ HPOUTFB3 HPDET1 GPSW1N CP1C1A F3 CP1VOUT1N F5 MICBIAS2A CP2VOUT G2 CP1C1B G4 MICBIAS1A G6 H1 MICBIAS1B H3 MICBIAS1C H5 MICBIAS2B GPSW2N MICDET2/ HPOUTFB2 GPSW1P GPSW2P MICDET1/ HPOUTFB1 JACKDET2 Register addresses from R12288 0x3000 upwards are formatted as 32-bit words. When accessing these addresses, the slice size should be a multiple of 4 bytes and the byte address should be aligned with the 32-bit data word boundaries i.e., an even number . The byte ordering for these register addresses is described in Table Table SLIMbus Register Read/Write Register Space 0x3000 Register Address Base address 0xYYYYZZ Base address + 2 Base address + 4 Base address + 6 Byte Sequence Bytes 4, 3, 2, 1 Bytes 8, 7, 6, 5 Bytes 12, 11, 10, 9 Bytes 16, 15, 14, 13 Output Signal Path The CS42L92 provides four stereo pairs of audio output signal paths. These outputs comprise ground-referenced headphone drivers, and a digital output interface suitable for external speaker drivers. The output signal paths are summarized in Table Table Output Signal Path Summary Signal Path OUT1L, OUT1R OUT2L, OUT2R OUT3L, OUT3R Descriptions Ground-referenced headphone/earpiece output Ground-referenced headphone/earpiece output Ground-referenced headphone/earpiece output OUT5L, OUT5R Digital speaker PDM output Output Pins HPOUT1L, HPOUT1R HPOUT2L, HPOUT2R HPOUT3L, HPOUT3R or HPOUT4L, HPOUT4R SPKDAT, SPKCLK The analog output paths incorporate high performance 32-bit sigma-delta DACs. Under default conditions, the headphone drivers provide a stereo, single-ended output. A mono mode is also supported, providing a differential BTL output configuration. The ground-referenced headphone output paths incorporate a common mode feedback path for rejection of system-related noise. These outputs support direct connection to headphone loads, with no requirement for AC coupling capacitors. The OUT1 and OUT2 paths can be configured in High Performance Mode, offering exceptional performance on the respective headphone outputs. Balanced stereo headphone loads can be supported by assigning the OUT1 and OUT2 signal paths for the left and right channels respectively, with the associated drivers configured for differential output. DS1162F1 CS42L92 Output Signal Path The digital output path provides a stereo pulse-density modulation PDM output interface, for connection to external audio devices. A total of two digital output channels are provided. Digital filters can be enabled in the output signal paths, supporting audiophile-quality DAC playback options. These hi-fi filters allow user selection of the preferred characteristics, e.g., linear phase, antialiasing, or apodizing filter responses . Digital volume control is available on all outputs analog and digital , with programmable ramp control for smooth, glitch-free operation. A configurable noise-gate function is available on each output signal path. Any two of the output signal paths may be selected as input to the AEC loop-back paths. The CS42L92 provides short-circuit detection on the headphone output paths. See Section for further details. The CS42L92 output signal paths are shown in Fig. Note that the OUT4 path is not implemented on this device. DS1162F1 CS42L92 Output Signal Path Digital Core OUT1L output OUT1L_VOL[7:0] p. 162 OUT1L_MUTE p. 162 OUT1R output OUT2L output OUT1R_VOL[7:0] p. 162 OUT1R_MUTE p. 162 OUT2L_VOL[7:0] p. 162 OUT2L_MUTE p. 162 OUT2R output OUT3L output OUT2R_VOL[7:0] p. 162 OUT2R_MUTE p. 162 OUT3L_VOL[7:0] p. 163 OUT3L_MUTE p. 163 OUT3R output 9 Ordering Information Product CS42L92 32-Bit 384-kHz Hi-Fi Audio Codec 1.Reel quantity = 6000 units. Table Ordering Information Package 104-ball WLCSP Halogen Free Pb Free Grade Commercial Temperature Range to +85°C Container Tape and Reel 1 Order # CS42L92-CWZR DS1162F1 CS42L92 10 References 10 References • MIPI Alliance, MIPI Alliance Specification for Serial Low-Power Inter-Chip Media Bus SLIMbus . • Google Inc, Android Wired Headset Specification, Version headset-spec.html • International Electrotechnical Commission, IEC60958-3 Digital Audio F1 NOV ‘17 • AVDD maximum rating amended Table • DSP memory sizes amended Table • Package dimension tolerances added Section Changes Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one nearest you, go to IMPORTANT NOTICE The products and services of Cirrus Logic International UK Limited Cirrus Logic, Inc. and other companies in the Cirrus Logic group collectively either “Cirrus Logic” or “Cirrus” are sold subject to Cirrus Logic’s terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. Software is provided pursuant to applicable license terms. Cirrus Logic reserves the right to make changes to its products and specifications or to discontinue any product or service without notice. Customers should therefore obtain the latest version of relevant information from Cirrus Logic to verify that the information is current and complete. Testing and other quality control techniques are utilized to the extent Cirrus Logic deems necessary. Specific testing of all parameters of each device is not necessarily performed. In order to minimize risks associated with customer applications, the customer must use adequate design and operating safeguards to minimize inherent or procedural hazards. Cirrus Logic is not liable for applications assistance or customer product design. The customer is solely responsible for its selection and use of Cirrus Logic products. Use of Cirrus Logic products may entail a choice between many different modes of operation, some or all of which may require action by the user, and some or all of which may be optional. Nothing in these materials should be interpreted as instructions or suggestions to choose one mode over another. Likewise, description of a single mode should not be interpreted as a suggestion that other modes should not be used or that they would not be suitable for operation. Features and operations described herein are for illustrative purposes only. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE “CRITICAL APPLICATIONS” . CIRRUS LOGIC PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, NUCLEAR SYSTEMS, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS LOGIC PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS LOGIC DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS LOGIC PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS LOGIC PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS LOGIC, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. This document is the property of Cirrus Logic and by furnishing this information, Cirrus Logic grants no license, express or implied, under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Any provision or publication of any third party’s products or services does not constitute Cirrus Logic’s approval, license, warranty or endorsement thereof. Cirrus Logic gives consent for copies to be made of the information contained herein only for use within your organization with respect to Cirrus Logic integrated circuits or other products of Cirrus Logic, and only if the reproduction is without alteration and is accompanied by all associated copyright, proprietary and other notices and conditions including this notice . This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. This document and its information is provided “AS IS” without warranty of any kind express or implied . All statutory warranties and conditions are excluded to the fullest extent possible. No responsibility is assumed by Cirrus Logic for the use of information herein, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. Cirrus Logic, Cirrus, the Cirrus Logic logo design, SoundClear, and WISCE are among the trademarks of Cirrus Logic. Other brand and product names may be trademarks or service marks of their respective owners. Copyright 2017 Cirrus Logic, Inc. All rights reserved. MIPI and SLIMbus are trademarks or registered trademarks of MIPI Alliance, Inc. USB-C is a trademark of USB Implementers Forum. Android is a trademark of Google, Inc. SPI is a trademark of Motorola. DS1162F1

PDF Datasheet Preview

CS42L92
32-Bit 384-kHz Hi-Fi Audio Codec
• Integrated multichannel 32-bit hi-fi audio hub codec 99-dB signal-to-noise ratio SNR mic input 48 kHz 127-dB SNR headphone playback 48 kHz total harmonic distortion + noise THD+N Ultrasonic input- and output-path support
• Up to eight analog or digital microphone DMIC inputs
• Multipurpose headphone/earpiece/line output drivers

Support for balanced headphone output loads 33 mW into load at THD+N Hi-fi filters for audiophile-quality playback
• Native audio playback up to 384 kHz sample rate, concurrent with voice and ultrasonic input signal paths
• Digital pulse-density modulation PDM output interface
• Multichannel asynchronous sample-rate conversion
• Multiline audio and control interface
• Three multichannel digital-audio interfaces

Standard data formats up to 384 kHz, 32 bits
• Flexible clocking, derived from MCLKn, AIFn, or SLIMbus

Low-power frequency-locked loops FLLs support reference clocks down to 32 kHz.
• Advanced accessory detection functions
• Configurable functions on up to 16 general-purpose
input/output GPIO pins
• Integrated regulators and charge pumps
• Small W-CSP package, 0.4-mm staggered ball array
• Smartphones, tablets, and multimedia handsets

MICVDD CP2VOUT CP2CA CP2CB CP1C1A CP1C1B CP1VOUT1P CP1VOUT1N CP1C2A CP1C2B CP1VOUT2P CP1VOUT2N AVDD AGND VREFC FLLVDD CPVDD1 CPVDD2 CPGND DCVDD DBVDD FLLGND DGND SUBGND

MICBIAS1A

MICBIAS1B MICBIAS1C MICBIAS1D MICBIAS2A

MICBIAS2B

LDO and MICBIAS

Generators

Charge Pumps

IN1ALN/DMICCLK1, IN1BLN IN1ALP/DMICDAT1, IN1BLP

IN1ARN/DMICCLK3 IN1ARP/DMICDAT3, IN1BR

IN2ALN/DMICCLK2 IN2ALP/DMICDAT2, IN2BL

IN2ARN/DMICCLK4 IN2ARP/DMICDAT4, IN2BR

Input Select
4 x ADC
4 x Stereo Digital Mic Interface

MCLK1 MCLK2 MCLK3

RESET IRQ

AIFnBCLK AIFnLRCLK

SLIMCLK

Clocking Control

SYSCLK ASYNCCLK

Digital Audio Interfaces AIF1, AIF2, AIF3

CS42L92

Reference Generator

Digital Mixing Core

Programmable DSP Five-band equalizer EQ Dynamic range control DRC Low-pass/high-pass filter LHPF Asynchronous sample -rate conversion Automatic sample -rate detection Data format conversion Ultrasonic demodulator

PWM signal generator Haptic control signal generator

PDM Driver

AEC Echo Cancelation Loop-Back

SLIMbus Interface

Control Interface SPI/I2C
DS1162F1
1 Pin Descriptions

WLCSP Pinout

CS42L92
1 Pin Descriptions

CPVDD1

B3 CP1VOUT2N B5

HPOUT4L

HPOUT3L

HPOUT2L B11 HPOUT1L B13

CP2CA

CP2CB

CP1C2A

CPGND

CP1C2B

C6 HPOUT3R C8 HPOUT2R

D3 CP1VOUT2P D5

HPOUT4R

CPVDD2

E4 CP1VOUT1P E6

TRST

MICDET5/ HPOUTFB5

E8 JACKDET1

HPDET2

HPOUT1R

MICDET4/ HPOUTFB4

MICDET3/ HPOUTFB3

HPDET1

GPSW1N

CP1C1A

F3 CP1VOUT1N F5 MICBIAS2A

CP2VOUT G2

CP1C1B

G4 MICBIAS1A G6

H1 MICBIAS1B H3 MICBIAS1C H5 MICBIAS2B

GPSW2N

MICDET2/ HPOUTFB2

GPSW1P

GPSW2P

MICDET1/ HPOUTFB1

JACKDET2
Register addresses from R12288 0x3000 upwards are formatted as 32-bit words. When accessing these addresses, the slice size should be a multiple of 4 bytes and the byte address should be aligned with the 32-bit data word boundaries i.e., an even number . The byte ordering for these register addresses is described in Table

Table SLIMbus Register Read/Write Register Space 0x3000

Register Address

Base address 0xYYYYZZ Base address + 2

Base address + 4

Base address + 6

Byte Sequence

Bytes 4, 3, 2, 1 Bytes 8, 7, 6, 5 Bytes 12, 11, 10, 9 Bytes 16, 15, 14, 13

Output Signal Path

The CS42L92 provides four stereo pairs of audio output signal paths. These outputs comprise ground-referenced headphone drivers, and a digital output interface suitable for external speaker drivers. The output signal paths are summarized in Table

Table Output Signal Path Summary

Signal Path OUT1L, OUT1R OUT2L, OUT2R OUT3L, OUT3R

Descriptions Ground-referenced headphone/earpiece output Ground-referenced headphone/earpiece output Ground-referenced headphone/earpiece output

OUT5L, OUT5R Digital speaker PDM output

Output Pins HPOUT1L, HPOUT1R

HPOUT2L, HPOUT2R

HPOUT3L, HPOUT3R or HPOUT4L, HPOUT4R

SPKDAT, SPKCLK

The analog output paths incorporate high performance 32-bit sigma-delta DACs.

Under default conditions, the headphone drivers provide a stereo, single-ended output. A mono mode is also supported, providing a differential BTL output configuration. The ground-referenced headphone output paths incorporate a common mode feedback path for rejection of system-related noise. These outputs support direct connection to headphone loads, with no requirement for AC coupling capacitors.

The OUT1 and OUT2 paths can be configured in High Performance Mode, offering exceptional performance on the respective headphone outputs. Balanced stereo headphone loads can be supported by assigning the OUT1 and OUT2 signal paths for the left and right channels respectively, with the associated drivers configured for differential output.

DS1162F1

CS42L92

Output Signal Path

The digital output path provides a stereo pulse-density modulation PDM output interface, for connection to external audio devices. A total of two digital output channels are provided.

Digital filters can be enabled in the output signal paths, supporting audiophile-quality DAC playback options. These hi-fi filters allow user selection of the preferred characteristics, e.g., linear phase, antialiasing, or apodizing filter responses .

Digital volume control is available on all outputs analog and digital , with programmable ramp control for smooth, glitch-free operation. A configurable noise-gate function is available on each output signal path. Any two of the output signal paths may be selected as input to the AEC loop-back paths.

The CS42L92 provides short-circuit detection on the headphone output paths. See Section for further details.

The CS42L92 output signal paths are shown in Fig. Note that the OUT4 path is not implemented on this device.

DS1162F1

CS42L92

Output Signal Path

Digital Core OUT1L output

OUT1L_VOL[7:0] p. 162 OUT1L_MUTE p. 162

OUT1R output OUT2L output

OUT1R_VOL[7:0] p. 162 OUT1R_MUTE p. 162

OUT2L_VOL[7:0] p. 162 OUT2L_MUTE p. 162

OUT2R output OUT3L output

OUT2R_VOL[7:0] p. 162 OUT2R_MUTE p. 162

OUT3L_VOL[7:0] p. 163 OUT3L_MUTE p. 163

OUT3R output
9 Ordering Information

Product

CS42L92 32-Bit 384-kHz Hi-Fi Audio Codec
1.Reel quantity = 6000 units.
Table Ordering Information

Package
104-ball WLCSP

Halogen Free

Pb Free

Grade Commercial

Temperature Range
to +85°C

Container Tape and

Reel 1

Order # CS42L92-CWZR

DS1162F1

CS42L92
10 References
10 References
• MIPI Alliance, MIPI Alliance Specification for Serial Low-Power Inter-Chip Media Bus SLIMbus .
• Google Inc, Android Wired Headset Specification, Version headset-spec.html
• International Electrotechnical Commission, IEC60958-3 Digital Audio

F1 NOV ‘17
• AVDD maximum rating amended Table
• DSP memory sizes amended Table
• Package dimension tolerances added Section

Changes

Contacting Cirrus Logic Support

For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one nearest you, go to

IMPORTANT NOTICE The products and services of Cirrus Logic International UK Limited Cirrus Logic, Inc. and other companies in the Cirrus Logic group collectively either “Cirrus Logic” or “Cirrus” are sold subject to Cirrus Logic’s terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. Software is provided pursuant to applicable license terms. Cirrus Logic reserves the right to make changes to its products and specifications or to discontinue any product or service without notice. Customers should therefore obtain the latest version of relevant information from Cirrus Logic to verify that the information is current and complete. Testing and other quality control techniques are utilized to the extent Cirrus Logic deems necessary. Specific testing of all parameters of each device is not necessarily performed. In order to minimize risks associated with customer applications, the customer must use adequate design and operating safeguards to minimize inherent or procedural hazards. Cirrus Logic is not liable for applications assistance or customer product design. The customer is solely responsible for its selection and use of Cirrus Logic products. Use of Cirrus Logic products may entail a choice between many different modes of operation, some or all of which may require action by the user, and some or all of which may be optional. Nothing in these materials should be interpreted as instructions or suggestions to choose one mode over another. Likewise, description of a single mode should not be interpreted as a suggestion that other modes should not be used or that they would not be suitable for operation. Features and operations described herein are for illustrative purposes only. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE “CRITICAL APPLICATIONS” . CIRRUS LOGIC PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, NUCLEAR SYSTEMS, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS LOGIC PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS LOGIC DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS LOGIC PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS LOGIC PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS LOGIC, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. This document is the property of Cirrus Logic and by furnishing this information, Cirrus Logic grants no license, express or implied, under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Any provision or publication of any third party’s products or services does not constitute Cirrus Logic’s approval, license, warranty or endorsement thereof. Cirrus Logic gives consent for copies to be made of the information contained herein only for use within your organization with respect to Cirrus Logic integrated circuits or other products of Cirrus Logic, and only if the reproduction is without alteration and is accompanied by all associated copyright, proprietary and other notices and conditions including this notice . This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. This document and its information is provided “AS IS” without warranty of any kind express or implied . All statutory warranties and conditions are excluded to the fullest extent possible. No responsibility is assumed by Cirrus Logic for the use of information herein, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. Cirrus Logic, Cirrus, the Cirrus Logic logo design, SoundClear, and WISCE are among the trademarks of Cirrus Logic. Other brand and product names may be trademarks or service marks of their respective owners. Copyright 2017 Cirrus Logic, Inc. All rights reserved. MIPI and SLIMbus are trademarks or registered trademarks of MIPI Alliance, Inc. USB-C is a trademark of USB Implementers Forum. Android is a trademark of Google, Inc. SPI is a trademark of Motorola.

DS1162F1

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Datasheet ID: CS42L92-CWZR 523173