PEX9765-AA80BI G

PEX9765-AA80BI G Datasheet


PEX9700 Series Switch Chips

Part Datasheet
PEX9765-AA80BI G PEX9765-AA80BI G PEX9765-AA80BI G (pdf)
Related Parts Information
PEX9712-AA80BI G PEX9712-AA80BI G PEX9712-AA80BI G
PEX9712-AARDK PEX9712-AARDK PEX9712-AARDK
PEX9733-AA80BI G PEX9733-AA80BI G PEX9733-AA80BI G
PEX9749-AA80BI G PEX9749-AA80BI G PEX9749-AA80BI G
PEX9781-AA80BI G PEX9781-AA80BI G PEX9781-AA80BI G
PEX9733-AARDK PEX9733-AARDK PEX9733-AARDK
PEX9781-AARDK PEX9781-AARDK PEX9781-AARDK
PEX9797-AA80BI G PEX9797-AA80BI G PEX9797-AA80BI G
PEX9716-AA80BI G PEX9716-AA80BI G PEX9716-AA80BI G
PEX9765-AARDK PEX9765-AARDK PEX9765-AARDK
PDF Datasheet Preview
PEX9700 Series Switch Chips

Managed PCI Express Switches Based on Technology

General Features
• State-of-the-art switch fabric I/Os among multiple hosts DMA latency TWC
• Any port can be a host port or Downstream device Port
• Works with standard PCIe end-points and hosts and software, as well as with existing application software
• MSI-X support
• Allows flexible fabric topologies

Key Advantages
• PCI Express Switches to 97 Lanes with Integrated on-chip SerDes to 25 Independent ports any Port as the Upstream Port
Low-power SerDes under 90 mW per Lane Relaxed Ordering configuration

Dedicated management port for mCPU
x4, x8, or x16, depending on Port configuration x4 can down-train to x1 and x2 width

Configurable through serial EEPROM, I2C, SMBus, and/or Host port
• Standards Compliant

PCI Express Base Specification, r3.1 backward compatible w/ PCIe r2.0, & r1.0a/1.1 Power Management Spec, r1.2
• High Performance line rate on all ports

Cut-Thru packet latency of less than 150ns x16 to x16 Max Payload Size through DMA

Converge Servers and IO controllers with PCIe
• Create cost-effective high-availability hyperscale systems by enabling communication between in-rack hosts and endpoints using PCIe
• Simplify connectivity while providing the highest PCIe switching performance available for data center servers, storage, and networks
• Reduce latency, system complexity, and power consumption by up to 50% in data-intensive environments
• Take advantage of industry-first features for most demanding hyper-converged, NVMe and rack scale systems

Avago PEX9700 switches allow customers to build high performance, low latency, scalable, cost-effective PCI Express-based fabrics. The switches enable I/O sharing with standard SR-IOV or multifunction capability, allowing multiple hosts or Nodes to reside on a single PCIe-based network. Hosts communicate through Ethernet-like DMA NIC DMA with other hosts and end-points using application software. Hosts may also communicate using Tunneled Window Connection TWC , a special low latency host-to-host communication capability for short packets.

Shared I/O Using Standards

PEX9700 switches allow the Virtual Functions VFs of SRIOV endpoints such as an Avago SAS controller to be shared and assigned to multiple hosts concurrently. Each host can enumerate its assigned functions using standard BIOS and OS software and use them with unmodified vendor-supplied drivers. The use of standard system software minimizes software support costs.

General Purpose Host-to-Host DMA

Ethernet is used almost universally for server to server communications. PEX9700 switches contain a virtual Ethernet NIC at each host port that allows Ethernet to be tunneled transparently through the fabric to any and all servers that are connected. Internal Ethernet communications using virtual Ethernet NICs and NIC DMA are complemented by the ability to share a physical SRIOV NIC, thus providing compatibility with the vast library of applications that leverage Ethernet communications.

Software-Defined Fabric

The switches are built on a hybrid hardware/software platform that offers high configurability and flexibility in regards to the number of hosts, end-points, and PCIe slots. The critical pathways have direct hardware support, enabling the fabric to offer non-blocking, line speed performance with features such as I/O sharing and DMA. The solution is completed by management processor that communicates with platform management via API and/or CLI. The solution offers an innovative approach to setup and control, making use of an off-chip management CPU mCPU to initialize the PEX9700 switch, configure the routing tables, handle errors, Hot-Plug events, and enable the solution to extend the capabilities without modifying the system software.

Key Advantages continued
• Quality of Service QoS 8 Traffic Classes TC supported
• Reliability, Availability, Serviceability PAK Support Tracking for surprise removal

All ports Hot-Plug capable thru I2C isolation on all ports support and Poison bit support Status bits and GPIO available

Tunneled Window Connection TWC

The DMA or TWC approaches are two ways hosts can communicate. TWC allows short messages to be sent from one host to another in a very low latency manner, and without the overhead associated with DMA.

Downstream Port Containment DPC/eDPC

Most servers have difficulty handling serious errors, especially when a PCIe end-point disappears from the system. DPC/eDPC allows a downstream link to be disabled after an uncorrectable error, making recovery possible in a controlled and robust manner.

Flexible Topologies

PEX9700 switches eliminate the topology restrictions of PCIe. The switch allows other topologies such as mesh, I/O Expansion Box with Multiple Hosts, and many others. And it does this while allowing the components to remain architecturally and software compatible with standard PCIe.

Improved SSC Isolation

The switches offer several mechanisms for supporting multi-clock domains that include spread spectrum clocking eliminating the need to pass a common clock across a backplane. In addition to the standard Avago approach to the problem, a new PCI-SIG approach called SRIS Separate Refclk Independent SSC Architecture is now available.

Products based on ExpressFabric technology can help deliver an outstanding solution for designing a heterogeneous system with a requirement for a flexible mix of processors, storage elements, and communication devices.

HPC Clusters

HPC clusters are made up of high-performance processing elements that communicate through high bandwidth, low latency pathways in order to execute applications such as medical imaging, financial trading, data warehousing, etc. PEX9700 switches can be used in switch fabric applications for HPC clustering. The processing subsystems can be connected to the PCIe fabric while running the same application software. PCIe switch based clustering eliminates expensive protocol bridging devices resulting in lower cost and power. And clustering systems can be built with I/O sharing as an additional native capability when needed.

Software Development Kit SDK

The SDK for the PEX9700 series includes drivers, source code and GUI interfaces to aid in configuring and debugging. Both the performancePAK and visionPAK are exclusive to Avago and are supported by its RDK and SDK, which are the industry’s most advanced hardware-and software development kits.
performancePAK

The performancePAK is a suite of unique and innovative performance features that allows Avago Gen 3 switches to be the highest performing switches in the market today.
visionPAK

The visionPAK is a debug diagnostics suite of integrated hardware and software instruments that allows users to help bring their systems to market faster.
Product Ordering Information

Switch Part Numbers PEX9797-AA80BC G PEX9781-AA80BC G PEX9765-AA80BC G PEX9749-AA80BC G PEX9733-AA80BC G PEX9716-AA80BC G PEX9712-AA80BC G

PXF55033-AA PXF51003-AA

Description 97-Lane, 25-Port ExpressFabric Device 35 x 35 mm2 81-Lane, 21-Port ExpressFabric Device 35 x 35 mm2 65-Lane, 17-Port ExpressFabric Device 35 x 35 mm2 49-Lane, 13-Port ExpressFabric Device 27 x 27 mm2 33-Lane, 9-Port ExpressFabric Device 27 x 27 mm2 16-Lane, 5-Port ExpressFabric Device 19 x19 mm2 12-Lane, 5-Port ExpressFabric Device 19 x 19 mm2 32-Port ExpressFabric top-of-rack switch box with QSFP+ connections 2-Port PCIe bus extender card with redrivers and QSFP+ connections

Rapid Development Kit RDK Part Number PEX9797-AARDK PEX9797-AARDK PEX9797-AARDK PEX9749-AARDK PEX9749-AARDK PEX9716-AARDK PEX9716-AARDK

Acronym Guide

Memory Access Controllers Window Connection Spectrum Clock Isolation Signaled Interrupts Refclk Independent SSC Architecture Port Containment DPC Commercial Temperature Range.......................0+70 Celsius
More datasheets: AT25DF041A-SSH-T | AT25DF041A-SH-T | AT25DF041A-SHF-T | PEX9712-AA80BI G | PEX9712-AARDK | PEX9733-AA80BI G | PEX9749-AA80BI G | PEX9781-AA80BI G | PEX9733-AARDK | PEX9781-AARDK


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Datasheet ID: PEX9765-AA80BI G 520517