PCI9656-BA66BI

PCI9656-BA66BI Datasheet


Connectivity s 64-bit, 66MHz PCI r2.2 compliant s Motorola PowerQUICC and

Part Datasheet
PCI9656-BA66BI PCI9656-BA66BI PCI9656-BA66BI (pdf)
Related Parts Information
PCI9656RDK-LITE PCI9656RDK-LITE PCI9656RDK-LITE
PCI9656-BA66BI G PCI9656-BA66BI G PCI9656-BA66BI G
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VERSION 2002

Connectivity s 64-bit, 66MHz PCI r2.2 compliant s Motorola PowerQUICC and
generic 32-bit, 66MHz local bus modes s 3.3V I/O, 5V tolerant bus interfaces s PICMG r2.0 Hot Swap Silicon s 272-ball, 27 x 27 mm, mm pitch PBGA

Performance s Zero wait state burst operation PCI bus bursts to 528 MB/sec Local bus bursts to 264 MB/sec s 2 DMA Channels Block and Scatter/Gather transfers DMA descriptor ring management Demand Mode and EOT

Hardware controls s Direct Master data transfers Generate any PCI transaction Read ahead and programmable
read prefetch counter s Direct Slave data transfers Access 8-, 16-, and 32-bit local
bus devices Deferred reads, deferred writes,
read ahead, posted writes, programmable read prefetch counter

Control s I2O r1.5 messaging unit s Eight mailbox and two
doorbell registers s PCI arbiter supports 7
external masters s Host mode reset/interrupt signal
configuration s PCI D3COLD Power Management

Event PME generation support s Serial EEPROM interface s JTAG boundary scan

PCI 9656
64-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC & Generic 32-bit, 66MHz Local Bus Designs

Maximum PCI Bandwidth for Your 32-bit Local Bus Applications The PCI 9656 offers flexible connectivity and high performance I/O acceleration features to enable leading edge PCI, CompactPCI, and embedded host designs. MPC 850/860 PowerQUICC Designs The PCI 9656 is the perfect match for the industry leading 32-bit communication processor, the Motorola MPC 850/860 PowerQUICC. The PCI 9656 provides a direct connection to PowerQUICC devices, enabling high-speed 64-bit, 66MHz PCI performance with its Data Pipe Architecture technology.

Generic 32-bit, 66MHz Local Bus Designs The PCI 9656 provides direct connection to two generic industry standard interconnect buses. Designers use these 32-bit, 66MHz buses for a myriad of high-speed devices ranging from processors, to DSPs, to memories, to custom ASICs and FPGAs. The PCI 9656 Data Pipe Architecture technology enables high-speed, 64-bit, 66MHz PCI I/O with those devices. Move Your 32-bit Local Bus Designs Up to 64-bit, 66MHz PCI Operation As PCI evolves to meet the ever increasing I/O demands of leading edge systems, PLX continues to provide leading edge, high performance PCI I/O acceleration solutions. Based on the architecture of the industry-leading PCI 9054, the PCI 9656 offers a variety of enhancements for the needs of today's telecom, networking, and I/O adapter designs s 64-bit, 66MHz PCI operation s 32-bit, 66MHz local bus operation s Dynamic DMA descriptor ring management with Valid bit semaphore control s PICMG r2.0 Hot Swap Silicon, including Bias Voltage, Early Power, 64-bit

Initialization, and Intially Not Responding Support s PCI Power Management r1.1 D3COLD Power Management Event PME generation s PCI arbiter supporting 7 external masters s Reset and interrupt pins configurable for embedded host applications s JTAG boundary scan

The PCI 9656 is register compatible with the PCI 9054, enabling easy software migration.

PCI 9656 Features

The PCI 9656 64-bit, 66MHz PCI I/O accelerator is the most advanced, general-purpose bus mastering device available for Motorola MPC 850/860 PowerQUICC and generic 32-bit, 66MHz local bus based designs. The PCI 9656 incorporates PLX’s industry leading Data Pipe Architecture technology, featuring DMA engines, programmable Direct Master and Direct Slave data transfer modes, and PCI messaging functions.

Interfaces

PCI s 64-bit, 66MHz r2.2 operation

Zero wait state bursts to 528 MB/s

Dual Address Cycle DAC support as a PCI bus master

Vital Product Data VPD
3.3V I/O, 5V tolerant
s PICMG r2.0 Hot Swap Silicon

Programming Interface 0 P=0

Bias Voltage Support

Early Power Support

Initially Not Responding Support
s PCI Hot Plug r1.0
s PCI Power Management r1.1

Supports D0, D1, D2, D3HOT, & D3COLD power states

D3COLD Power Management Event PME generation to meet PC 2001 Windows 98/2000 communication adapter logo certification requirements

Local Bus s Three local bus options on the device

M Mode Motorola MPC 850/860 PowerQUICC and PowerPC 80x/82x

C Mode De-multiplexed address and data buses for Intel DSPs, custom ASICs and FPGAs, and others

J Mode Multiplexed address and data buses for Intel i960, IBM PowerPC 401, IDT RC32364, DSPs, IOP 480, and others
s 32-bit, 66MHz operation
Product Ordering Information

PCI 9656-BA66BI PCI 9656-BA66BI G CompactPCI 9656RDK-860 SDK-LITE SDK-PRO PCI 9656RDK-LITE
64-bit, 66 MHz PCI Bus Mastering I/O Accelerator for PowerQUICC and Generic 32-bit, 66MHz Bus Based Designs
64-bit, 66 MHz PCI Bus Mastering I/O Accelerator for PowerQUICC and Generic 32-bit, 66MHz Bus Based Designs Lead-Free

CompactPCI 9656 Rapid Development Kit with Motorola MPC860 PowerQUICC CPU and communications channels

Windows Host-Side Software Development Kit for PLX I/O Accelerators and I/O Processors

Windows Host-Side and Local-Side Software Development Kit for PLX I/O Accelerators and I/O Processors

PCI 9656 Rapid Development Kit with prototyping area for generic Local Bus designs
2002 by PLX Technology, Inc. All rights reserved. PLX and Data Pipe Architecture are trademarks of PLX Technology, Inc. All oth
er product names that appear in this material are for identi cation purposes only and are acknowledged to be
trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and r eliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX

Technology, Inc. reserves the right, without notice, to make changes in product design or speci cation.
9656-SIL-PB-P1-1.0
2/02 3K
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Datasheet ID: PCI9656-BA66BI 520495