BCM8155FAIFB

BCM8155FAIFB Datasheet

BCM8155

Part	Datasheet
BCM8155FAIFB	BCM8155FAIFB (pdf)

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BCM8155 Multirate Low-Power 10G RZ/NRZ/Duo-binary Transceiver with 10G Clock SUMMARY OF BENEFITS • Fully integrated multirate CDR, DEMUX, MUX, CMU • 300-pin Multisource Agreement MSA compatible • Compliant with ITU GR-253, XFP, and SFP+ specifications • 16-bit LVDS interface compliant with Optical LOSIB • CMU and CDR lock detect • FIFO overflow alarm • Reference clock 1/16 or 1/64 of the line data rate • Selectable RX clock and RX data squelch • Selectable timing modes/cleanup are field-configurable • Internal phase detector and charge pump for cleanup phase- locked loop PLL external VCXO required • Broadcom Serial Control BSC interface compatible with I2C standard • Optional SPI interface • Core voltage, 1V • Low power 600 mW • Enhanced capability for long haul transmission with the ability to enable RZ modulation on the transmitter • Compliant with OIF, ITU-T, XFI specification, and IEEE 802.3ae standards • Input sensitivity 10 mV peak-to-peak • Rates supported from Gbps to Gbps • Fault isolation with loopbacks, pattern generator, and checker • Reduces design cycle and time-to-market • High-level of integration allows for higher port density solutions. • Lowest power SFI-4 to 10G serial transceiver • Standard CMOS 65 nm fabrication process • OC-192/STM-64/10-GbE/FEC transmission equipment • SONET/SDH/10-GbE/10FC/FEC for RZ, NRZ or duo- binary optical modules • ADD/DROP multiplexers • Digital cross-connects • ATM switch backbone • SONET/SDH/10-GbE/10FC/FEC for NRZ, RZ, or duo- binary test equipment • Terabit and edge routers OVERVIEW Reference Clock Inputs Reference Clock Outputs TXREFCLKP/N RXREFCLKP/N VCXOP/N TXPCLKP/N TXMCLKP/N RXMCLKP/N Transmitter Parallel Inputs Receiver Parallel Outputs TXPICLKP/N TXDIN[15:0]P/N RXPOCLKP/N RXDOUT[15:0]P/N Filter and Bias Inputs Clean-up PLL Charge Pump Output Resistor Calibration Reference TXVCP/N RXVCP/N RDINCM OFFSETP/N PHDOUT RB_CAL RB_CAL_VSS Status Outputs TXFIFOERRB TXLOCKERRB PHDLOCKERRB ALOSB RXFIFOERRB RXLOCKERRB Control Inputs RESETB LOSIB TXREFSEL SPI_SEL SDA SCL ADR[2:0] System Interface Line Interface +1.0V Differential Externally AC-Coupled Internally Biased

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BCM8155

Multirate Low-Power 10G RZ/NRZ/Duo-binary Transceiver with 10G Clock

SUMMARY OF BENEFITS
• Fully integrated multirate CDR, DEMUX, MUX, CMU
• 300-pin Multisource Agreement MSA compatible
• Compliant with ITU GR-253, XFP, and SFP+ specifications
• 16-bit LVDS interface compliant with Optical

LOSIB
• CMU and CDR lock detect
• FIFO overflow alarm
• Reference clock 1/16 or 1/64 of the line data rate
• Selectable RX clock and RX data squelch
• Selectable timing modes/cleanup are field-configurable
• Internal phase detector and charge pump for cleanup phase-
locked loop PLL external VCXO required
• Broadcom Serial Control BSC interface compatible with

I2C standard
• Optional SPI interface
• Core voltage, 1V
• Low power 600 mW
• Enhanced capability for long haul transmission with the ability to enable RZ modulation on the transmitter
• Compliant with OIF, ITU-T, XFI specification, and IEEE 802.3ae standards
• Input sensitivity 10 mV peak-to-peak
• Rates supported from Gbps to Gbps
• Fault isolation with loopbacks, pattern generator, and
checker
• Reduces design cycle and time-to-market
• High-level of integration allows for higher port density
solutions.
• Lowest power SFI-4 to 10G serial transceiver
• Standard CMOS 65 nm fabrication process
• OC-192/STM-64/10-GbE/FEC transmission equipment
• SONET/SDH/10-GbE/10FC/FEC for RZ, NRZ or duo-
binary optical modules
• ADD/DROP multiplexers
• Digital cross-connects
• ATM switch backbone
• SONET/SDH/10-GbE/10FC/FEC for NRZ, RZ, or duo-
binary test equipment
• Terabit and edge routers

OVERVIEW

Reference Clock Inputs

Reference Clock Outputs

TXREFCLKP/N RXREFCLKP/N

VCXOP/N

TXPCLKP/N TXMCLKP/N RXMCLKP/N

Transmitter Parallel Inputs

Receiver Parallel Outputs

TXPICLKP/N TXDIN[15:0]P/N

RXPOCLKP/N RXDOUT[15:0]P/N

Filter and Bias Inputs

Clean-up PLL Charge Pump Output

Resistor Calibration Reference

TXVCP/N RXVCP/N RDINCM OFFSETP/N

PHDOUT

RB_CAL RB_CAL_VSS

Status Outputs

TXFIFOERRB TXLOCKERRB PHDLOCKERRB

ALOSB RXFIFOERRB RXLOCKERRB

Control Inputs

RESETB LOSIB

TXREFSEL SPI_SEL

SDA SCL ADR[2:0]

System Interface

Line Interface
+1.0V Differential Externally AC-Coupled Internally Biased

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Datasheet ID: BCM8155FAIFB 520236