Gbps, Active Back-Termination, Differential VCSEL Driver ADN2530
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ADN2530YCPZ-WP (pdf) |
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ADN2530YCPZ-R2 |
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Data Sheet Gbps, Active Back-Termination, Differential VCSEL Driver ADN2530 Up to Gbps operation −40°C to +100°C operation Very low power ISUPPLY = 65 mA Typical 26 ps rise/fall times Full back-termination of output transmission lines Crosspoint adjust function PECL-/CML-compatible data inputs Bias current range 2 mA to 25 mA Differential modulation current range mA to 23 mA Automatic laser shutdown ALS V operation Compact 3 mm x 3 mm LFCSP Voltage-input control for bias and modulation currents XFP-compliant bias current monitor 10 Gb Ethernet optical transceivers 10G-BASE-LRM optical transceivers 8x and 10x Fibre Channel optical transceivers XFP/X2/XENPAK/MSA 300 optical modules SONET OC-192/SDH STM-64 optical transceivers The ADN2530 laser diode driver is designed for direct modulation of packaged VCSELs with a differential resistance ranging from 35 to 140 The active back-termination technique provides excellent matching with the output transmission lines while reducing the power dissipation in the output stage. The back-termination in the ADN2530 absorbs signal reflections from the TOSA end of the output transmission lines, enabling excellent optical eye quality to be achieved even when the TOSA end of the output transmission lines is significantly misterminated. The small package provides the optimum solution for compact modules where laser diodes are packaged in low pin count optical subassemblies. The modulation and bias currents are programmable via the MSET and BSET control pins. By driving these pins with control voltages, the user has the flexibility to implement various average power and extinction ratio control schemes, including closed-loop control and look-up tables. The eye crosspoint in the output eye diagram is adjustable via the crosspoint adjust CPA control voltage input. The automatic laser shutdown ALS feature allows the user to turn on/off the bias and modulation currents by driving the ALS pin with the proper logic levels. The product is available in a space-saving 3 mm x 3 mm LFCSP specified from −40°C to +100°C. DATAP DATAN FUNCTIONAL BLOCK DIAGRAM ADN2530 CROSS POINT ADJUST IMOD VCC IMODP IMODN IBMON IBIAS 05457-001 MSET BSET Figure Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel Analog Devices, Inc. All rights reserved. Technical Support ADN2530 TABLE OF CONTENTS Package Thermal Specifications 4 Absolute Maximum 5 ESD 5 Pin Configuration and Function 6 Typical Performance Characteristics 7 Theory of Operation 10 Input Stage 10 Bias Current 10 0 Initial Version Data Sheet Automatic Laser Shutdown ALS 11 Modulation 11 Load Mistermination 13 Crosspoint 13 Power Consumption 13 Applications Information 15 Typical Application Circuit 15 Layout 15 Design Example 16 Headroom Calculations 16 BSET and MSET Pin Voltage Calculation 16 IBIAS Monitor Accuracy 17 Outline Dimensions 18 Ordering Guide 18 Data Sheet ADN2530 SPECIFICATIONS VCC = VCCMIN to VCCMAX, TA = −40°C to +100°C, 100 differential load impedance, crosspoint adjust disabled, unless otherwise noted. Typical values are specified at 25°C and IMOD = 10 mA with crosspoint adjust disabled, unless otherwise noted. Table Parameter BIAS CURRENT IBIAS Bias Current Range Bias Current While ALS Asserted Compliance Voltage1 MODULATION CURRENT IMODP, IMODN Modulation Current Range Modulation Current While ALS Asserted Crosspoint Adjust CPA Range2 Rise Time 20% to 80% 2, 3, 4 Fall Time 20% to 80% 2, 3, 4 Random Jitter2, 3, 4 Deterministic Jitter2, 4, 5 Deterministic Jitter 2, 4, 6 Differential |S22| Compliance Voltage1 DATA INPUTS DATAP, DATAN Input Data Rate Differential Input Swing Differential |S11| Input Termination Resistance BIAS CONTROL INPUT BSET Voltage to IBIAS Gain BSET Input Resistance MODULATION CONTROL INPUT MSET Voltage to IMOD Gain MSET Input Resistance BIAS MONITOR IBMON to IBIAS Ratio Accuracy of IBIAS to IBMON Ratio AUTOMATIC LASER SHUTDOWN ALS VIH VIL IIL IIH Typ Max Unit Test Conditions/Comments ALS = high VCC V IBIAS = 25 mA VCC V IBIAS = 2 mA VCC − 26 −5 23 19 250 65 VCC + mA diff mA diff µA diff % ps rms ps rms ps p-p ps p-p ps p-p ps p-p dB V RLOAD = 35 to 100 differential RLOAD = 140 differential ALS = high CPA disabled CPA 35% to 65% CPA disabled CPA 35% to 65% CPA disabled CPA 35% to 65% Gbps, CPA disabled Gbps, CPA 35% to 65% Gbps, CPA disabled Gbps, CPA 35% to 65% 5 GHz < f < 10 GHz, Z0 = 100 differential f < 5 GHz, Z0 = 100 differential Gbps V p-p diff Differential ac-coupled −15 f < 10 GHz, Z0 = 100 differential 100 115 Differential mA/V 1000 1200 mA/V ORDERING GUIDE Model1 ADN2530YCPZ-WP ADN2530YCPZ-R2 ADN2530YCPZ-REEL7 EVAL-ADN2530-ANZ 1 Z = RoHS Compliant Part. Temperature Range −40°C to +100°C −40°C to +100°C −40°C to +100°C Package Description 16-Lead LFCSP_WQ, 50-Piece Waffle Pack 16-Lead LFCSP_WQ, 250-Piece Reel 16-Lead LFCSP_WQ, 1500-Piece Reel Evaluation Board Package Option CP-16-27 CP-16-27 CP-16-27 Branding F08 Data Sheet NOTES ADN2530 ADN2530 NOTES Data Sheet Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. |
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